SCLS384H 鈭?SEPTEMBER 1997 鈭?REVISED APRIL 2005
SN54LV240A, SN74LV240A
OCTAL BUFFERS/DRIVERS
WITH 3 STATE OUTPUTS
D
2-V to 5.5-V V
CC
Operation
D
Max t
pd
of 6.5 ns at 5 V
D
Typical V
OLP
(Output Ground Bounce)
D
D
D
D
<0.8 V at V
CC
= 3.3 V, T
A
= 25掳C
Typical V
OHV
(Output V
OH
Undershoot)
>2.3 V at V
CC
= 3.3 V, T
A
= 25掳C
Support Mixed-Mode Voltage Operation on
All Ports
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
鈭?2000-V Human-Body Model (A114-A)
鈭?200-V Machine Model (A115-A)
鈭?1000-V Charged-Device Model (C101)
SN54LV240A . . . J OR W PACKAGE
SN74LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
2Y4
1A1
1OE
V
CC
These octal buffers/drivers are designed for 2-V to
5.5-V V
CC
operation.
The 鈥橪V240A devices are designed specifically to
improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
These devices are organized as two 4-bit
buffers/line drivers with separate output-enable
(OE) inputs. When OE is low, the device passes
data from the A inputs to the Y outputs. When OE
is high, the outputs are in the high-impedance
state.
ORDERING INFORMATION
TA
PACKAGE鈥?/div>
Tube of 25
SOIC 鈭?DW
SOP 鈭?NS
SSOP 鈭?DB
鈭?0掳C to 85掳C
TSSOP 鈭?PW
TVSOP 鈭?DGV
CDIP 鈭?J
鈭?5 C 125掳C
鈭?5掳C to 125 C
CFP 鈭?W
LCCC 鈭?FK
Reel of 2000
Reel of 2000
Reel of 2000
Tube of 70
Reel of 2000
Reel of 250
Reel of 2000
Tube of 20
Tube of 85
Tube of 55
ORDERABLE
PART NUMBER
SN74LV240ADW
SN74LV240ADWR
SN74LV240ANSR
SN74LV240ADBR
SN74LV240APW
SN74LV240APWR
SN74LV240APWT
SN74LV240ADGVR
SNJ54LV240AJ
SNJ54LV240AW
SNJ54LV240AFK
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2OE
1Y1
2A4
1Y2
2A3
1Y3
description/ordering information
SN54LV240A . . . FK PACKAGE
(TOP VIEW)
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
Copyright
铮?/div>
2005, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
2Y1
GND
2A1
1Y4
2A2
TOP-SIDE
MARKING
LV240A
74LV240A
LV240A
LV240A
LV240A
SNJ54LV240AJ
SNJ54LV240AW
SNJ54LV240AFK
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