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ST10F269-T3 Datasheet

  • ST10F269-T3

  • 16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYT...

  • 1513.42KB

  • 160页

  • STMICROELECTRONICS

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ST10F269-T3
16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM
s
HIGH PERFORMANCE 32MHz CPU WITH DSP
FUNCTION
鈥?16-BIT CPU WITH 4-STAGE PIPELINE
鈥?62.5ns INSTRUCTION CYCLE TIME AT 32MHz
MAX CPU CLOCK
鈥?MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT
MULTIPLICATION, 40-BIT ACCUMULATOR
鈥?REPEAT UNIT
鈥?ENHANCED BOOLEAN BIT MANIPULATION FA-
CILITIES
鈥?ADDITIONAL INSTRUCTIONS TO SUPPORT HLL
AND OPERATING SYSTEMS
鈥?SINGLE-CYCLE CONTEXT SWITCHING SUP-
PORT
MEMORY ORGANIZATION
鈥?256K BYTE ON-CHIP FLASH MEMORY SINGLE
VOLTAGE WITH ERASE/PROGRAM CONTROLLER.
鈥?100K ERASING/PROGRAMMING CYCLES.
鈥?UP TO 16M BYTE LINEAR ADDRESS SPACE FOR
CODE AND DATA (5M BYTES WITH CAN)
鈥?2K BYTE ON-CHIP INTERNAL RAM (IRAM)
鈥?10K BYTE ON-CHIP EXTENSION RAM (XRAM)
FAST AND FLEXIBLE BUS
鈥?PROGRAMMABLE EXTERNAL BUS CHARACTE-
RISTICS FOR DIFFERENT ADDRESS RANGES
鈥?8-BIT OR 16-BIT EXTERNAL DATA BUS
鈥?MULTIPLEXED OR DEMULTIPLEXED EXTERNAL
ADDRESS/DATA BUSES
鈥?FIVE PROGRAMMABLE CHIP-SELECT SIGNALS
鈥?HOLD-ACKNOWLEDGE BUS ARBITRATION SUP-
PORT
INTERRUPT
鈥?8-CHANNEL PERIPHERAL EVENT CONTROLLER
FOR SINGLE CYCLE INTERRUPT DRIVEN DATA
TRANSFER
鈥?16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH
56 SOURCES, SAMPLING RATE DOWN TO
31.25ns
TIMERS
鈥?TWO MULTI-FUNCTIONAL GENERAL PURPOSE
TIMER UNITS WITH 5 TIMERS
鈥?TWO 16-CHANNEL CAPTURE / COMPARE UNITS
A/D CONVERTER
鈥?16-CHANNEL 10-BIT
鈥?6.06碌s CONVERSION TIME AT 32MHz CPU CLOCK
4-CHANNEL PWM UNIT
SERIAL CHANNELS
鈥?SYNCHRONOUS / ASYNCHRONOUS SERIAL
CHANNEL
鈥?HIGH-SPEED SYNCHRONOUS CHANNEL
TQFP144 (20 x 20 x 1.40 mm)
(Thin Quad Flat Pack)
ORDER CODE:
ST10F269-T3
s
s
TWO CAN 2.0B INTERFACES OPERATING ON ONE
OR TWO CAN BUSSES (30 OR 2x15 MESSAGE
OBJECTS)
FAIL-SAFE PROTECTION
鈥?PROGRAMMABLE WATCHDOG TIMER
鈥?OSCILLATOR WATCHDOG
s
s
s
ON-CHIP BOOTSTRAP LOADER
CLOCK GENERATION
鈥?ON-CHIP PLL
鈥?DIRECT OR PRESCALED CLOCK INPUT
s
s
s
REAL TIME CLOCK
UP TO 111 GENERAL PURPOSE I/O LINES
鈥?INDIVIDUALLY PROGRAMMABLE
OUTPUT OR SPECIAL FUNCTION
AS
INPUT,
鈥?PROGRAMMABLE THRESHOLD (HYSTERESIS)
s
s
s
s
IDLE AND POWER DOWN MODES
SINGLE VOLTAGE SUPPLY: 5V 卤10% (EMBEDDED
REGULATOR FOR 2.7V CORE SUPPLY).
TEMPERATURE RANGE: -40 + 125掳C
144-PIN TQFP PACKAGE
16
CPU-Core and MAC Unit
16
2K Byte
Internal
RAM
s
32
256K Byte
Flash Memory
s
16
10K Byte
XRAM
PEC
W
atchdog
Oscillator
and PLL
CAN1_RXD
CAN1_TXD
CAN2_RXD
CAN2_TXD
CAN1
Interrupt Controller
CAN2
16
XT
AL1
2.7V
XT
AL2
s
s
s
Voltage
Regulator
Port 4 Port 1 Port 0
GPT1
ASC usart
CAPCOM2
10-Bit ADC
PWM
16
External Bus
Controller
CAPCOM1
SSC
GPT2
16
Port 2
8
16
BRG
Port 3
15
BRG
Port 7
8
Port 8
8
Port 6
8
Port 5
16
March 2003
1/160

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