ST10F269-T3 Datasheet

IC型号：
ST10F269-T3
PDF描述：
16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYT...
文件大小：
1513.42KB
PDF页数：
160页
芯片厂家：
STMICROELECTRONICS

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ST10F269-T3

When the ST10F269-T3 has entered BSL mode, the following configuration is automatically set (values

that deviate from the normal reset values, are

marked

Watchdog Timer:

Context Pointer CP:

Stack Pointer SP:

Disabled

FA00h

FA40h

P3.10 / TXD0:

0E00h

FA40h

FA0Ch 0<->C

acc. to startup configuration

鈥?鈥?/div>

8011h

Acc. to 鈥?0鈥?Byte

DP3.10:

In this case, the watchdog timer is disabled, so the

bootstrap loading sequence is not time limited.

Pin TXD0 is configured as output, so the

ST10F269-T3 can return the identification Byte.

Even if the internal Flash is enabled, no code can

be executed out of it.

The hardware that activates the BSL during reset

may be a simple pull-down resistor on P0L.4 for

systems that use this feature upon every

hardware reset.

A switchable solution (via jumper or an external

signal) can be used for systems that

only temporarily use the bootstrap loader (see

Figure 6).

After sending the identification Byte the

ASC0 receiver is enabled and is ready to

receive the initial 32 Bytes from the host. A half

duplex connection is therefore sufficient to feed

the BSL.

Figure 6 :

Hardware Provisions to Activate the BSL

5.6.2 - Memory Configuration After Reset

The configuration (and the accessibility) of the

ST10F269-T3鈥檚 memory areas after reset in

Bootstrap-Loader mode differs from the standard

case. Pin EA is not evaluated when BSL mode is

selected, and accesses to the internal Flash area

are partly redirected, while the ST10F269-T3 is in

BSL mode (see Figure 7). All code fetches are

made from the special Boot-ROM, while data

accesses read from the internal user Flash. Data

accesses will return undefined values on

ROMless devices.

The code in the Boot-ROM is not an invariant

feature of the ST10F269-T3. User software

should not try to execute code from the internal

Flash area while the BSL mode is still active, as

these fetches will be redirected to the Boot-ROM.

The Boot-ROM will also 鈥渕ove鈥?to segment 1,

when the internal Flash area is mapped to

segment 1 (see Figure 7).

External

Signal

POL.4

Normal Boot

BSL

POL.4

8k鈩?/div>

POL.4

8k鈩?/div>

Circuit 2

Circuit 1

31/160

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