enable bit, GIE (INTCON<7>).
for all non-peripheral interrupt sources.
read as 鈥?鈥?/div>
- n= Value at POR reset
bit 7:
GIE:
Global Interrupt Enable bit
1 = Enables all un-masked interrupts
0 = Disables all interrupts
PEIE:
Peripheral Interrupt Enable bit
1 = Enables all un-masked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE:
TMR0 Over铿俹w Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE:
RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
RBIE:
RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
T0IF:
TMR0 Over铿俹w Interrupt Flag bit
1 = TMR0 register over铿俹wed (must be cleared in software)
0 = TMR0 register did not over铿俹w
INTF:
RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
RBIF:
RB Port Change Interrupt Flag bit
1 = When at least one of the RB7:RB4 pins changed state (See Section 5.2 to clear interrupt)
0 = None of the RB7:RB4 pins have changed state
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
漏
1996 Microchip Technology Inc.
Preliminary
DS30559A-page 23