鈥?/div>
Literal and control
operations
All instructions are executed within one single instruc-
tion cycle, unless a conditional test is true or the pro-
gram counter is changed as a result of an instruction.
In this case, the execution takes two instruction cycles
with the second cycle executed as a NOP. One instruc-
tion cycle consists of four oscillator periods. Thus, for
an oscillator frequency of 4 MHz, the normal instruction
execution time is 1
碌
s. If a conditional test is true or the
program counter is changed as a result of an instruc-
tion, the instruction execution time is 2
碌
s.
Table 10-2 lists the instructions recognized by the
MPASM assembler.
Figure 10-1 shows the three general formats that the
instructions can have.
Note:
To maintain upward compatibility with
future PIC16CXX products, do not use the
OPTION
and
TRIS
instructions.
All examples use the following format to represent a
hexadecimal number:
0xhh
where h signi铿乪s a hexadecimal digit.
TABLE 10-1:
Field
f
W
b
k
x
OPCODE FIELD
DESCRIPTIONS
Description
Register 铿乴e address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit 铿乴e register
Literal 铿乪ld, constant data or label
Don't care location (= 0 or 1)
The assembler will generate code with x = 0. It is the
recommended form of use for compatibility with all
Microchip software tools.
FIGURE 10-1: GENERAL FORMAT FOR
INSTRUCTIONS
Byte-oriented
铿乴e register operations
13
8 7 6
OPCODE
d
f (FILE #)
d = 0 for destination W
d = 1 for destination f
f = 7-bit 铿乴e register address
Bit-oriented
铿乴e register operations
13
10 9
7 6
OPCODE
b (BIT #)
f (FILE #)
b = 3-bit bit address
f = 7-bit 铿乴e register address
Literal and control
operations
General
13
8 7
OPCODE
k = 8-bit immediate value
CALL
and
GOTO
instructions only
13
11
OPCODE
10
k (literal)
0
0
0
Destination select; d = 0: store result in W,
d = 1: store result in 铿乴e register f.
Default is d = 1
label
Label name
d
TOS
PC
Top of Stack
Program Counter
PCLATH
Program Counter High Latch
GIE
Global Interrupt Enable bit
WDT
Watchdog Timer/Counter
TO
Time-out bit
PD
Power-down bit
dest
Destination either the W register or the speci铿乪d
register 铿乴e location
[ ] Options
( )
Contents
0
k (literal)
k = 11-bit immediate value
鈫?/div>
<>
鈭?/div>
Assigned to
Register bit 铿乪ld
In the set of
i
talics
User de铿乶ed term (font is courier)
The instruction set is highly orthogonal and is grouped
into three basic categories:
漏
1996 Microchip Technology Inc.
DS30559A-page 73
This document was created with FrameMaker 4 0 4
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