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CS5530A Datasheet

  • CS5530A

  • National Semiconductor [Geode CS5530A I/O Companion Multi-F...

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Geode鈩?CS5530A
Functional Description
(Continued)
3.4.3.6 Device Power Management Register Programming Summary
Table 3-35 provides a programming register summary of
figuration Registers - Function 0" on page 153 and Section
the device idle timers, address traps, and general purpose
4.3.2 "SMI Status and ACPI Timer Registers - Function 1"
I/O pins. For complete bit information regarding the regis-
on page 182.
ters listed in Table 3-35, refer to Section 4.3.1 "Bridge Con-
Table 3-35. Device Power Management Programming Summary
Located at F0 Index xxh Unless Otherwise Noted
Device Power
Management Resource
Global Timer Enable
Keyboard / Mouse Idle Timer
Parallel / Serial Idle Timer
Floppy Disk Idle Timer
Video Idle Timer (Note
1)
VGA Timer (Note
2)
Primary Hard Disk Idle Timer
Secondary Hard Disk Idle Timer
User Defined Device 1 Idle Timer
User Defined Device 2 Idle Timer
User Defined Device 3 Idle Timer
Global Trap Enable
Keyboard / Mouse Trap
Parallel / Serial Trap
Floppy Disk Trap
Video Access Trap
Primary Hard Disk Trap
Secondary Hard Disk Trap
User Defined Device 1 Trap
User Defined Device 2 Trap
User Defined Device 3 Trap
General Purpose Timer 1
General Purpose Timer 2
GPIO7 Pin
GPIO6 Pin
GPIO5 Pin
GPIO4 Pin
GPIO3 Pin
GPIO2 Pin
GPIO1 Pin
GPIO0 Pin
Suspend Modulation OFF/ON
Video Speedup
IRQ Speedup
Enable
80h[1]
81h[3]
81h[2]
81h[1]
81h[7]
83h[3]
81h[0]
83h[7]
81h[4]
81h[5]
81h[6]
80h[2]
82h[3]
82h[2]
82h[1]
82h[7]
82h[0]
83h[6]
82h[4]
82h[5]
82h[6]
83h[0]
83h[1]
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
96h[0]
80h[4]
80h[3]
N/A
93h[1:0]
93h[1:0]
9Ah[15:0], 93h[7]
A6h[15:0]
8Eh[7:0]
98h[15:0], 93h[5]
ACh[15:0], 93h[4]
A0h[15:0], C0h[31:0], CCh[7:0]
A2h[15:0], C4h[31:0], CDh[7:0]
A4h[15:0], C8h[31:0], CEh[7:0]
N/A
9Eh[15:0] 93h[1:0]
9Ch[15:0], 93h[1:0]
93h[7]
N/A
93h[5]
93h[4]
C0h[31:0], CCh[7:0]
C4h[31:0], CDh[7:0]
C8h[31:0], CEh[7:0]
88h[7:0], 89h[7:0], 8Bh[4]
8Ah[7:0], 8Bh[5,3,2]
90h[7], 91h[7], 92h[7], 97h[7,3]
90h[6], 91h[6], 92h[6]
90h[5], 91h[5], 97h[6,2]
90h[4], 91h[4], 97h[5,1]
90h[3], 91h[3], 97h[4,0]
90h[2], 91h[2], 92h[5,2]
90h[1], 91h[1] 92h[4,1]
90h[0], 91h[0], 92h[3,0]
94h[7:0]/95h[7:0]
8Dh[7:0]
8Ch[7:0]
Configuration
Second Level SMI
Status/No Clear
N/A
85h[3]
85h[2]
85h[1]
85h[7]
F1BAR+Memory
Offset 00h[6]
85h[0]
86h[4]
85h[4]
85h[5]
85h[6]
N/A
86h[3]
86h[2]
86h[1]
86h[7]
86h[0]
86h[5]
F1BAR+Memory
Offset 04h[2]
F1BAR+Memory
Offset 04h[3]
F1BAR+Memory
Offset 04h[4]
F1BAR+Memory
Offset 04h[0]
F1BAR+Memory
Offset 04h[1]
91h[7]
87h[4,3], 91h[6]
91h[5]
91h[4]
91h[3]
87h[7], 91h[2]
87h[6], 91h[1]
87h[5], 91h[0]
N/A
A8h[15:0]
N/A
Second Level SMI
Status/With Clear
N/A
F5h[3]
F5h[2]
F5h[1]
F5h[7]
F1BAR+Memory
Offset 02h[6]
F5h[0]
F6h[4]
F5h[4]
F5h[5]
F5h[6]
N/A
F6h[3]
F6h[2]
F6h[1]
F6h[7]
F6h[0]
F6h[5]
F1BAR+Memory
Offset 06h[2]
F1BAR+Memory
Offset 06h[3]
F1BAR+Memory
Offset 06h[4]
F1BAR+Memory
Offset 06h[0]
F1BAR+Memory
Offset 06h[1]
N/A
F7h[4,3]
N/A
N/A
N/A
F7h[7]
F7h[6]
F7h[5]
N/A
N/A
N/A
Note:
1. This function is used for Suspend determination.
2. This function is used for SoftVGA, not power management. It is not affected by Global Power Enable.
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