SLES003A Datasheet

IC型号：
SLES003A
PDF描述：
Texas Instruments [USB Streaming Controller]
文件大小：
487.38KB
芯片厂家：
TI

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2.2.14.4 Single Byte Read

As shown in Figure 2鈥?6, a single byte data read transfer begins with the TAS1020A device transmitting a start

condition followed by the I

C device address and the read/write bit. For the data read transfer, both a write followed

by a read are actually performed. Initially, a write is performed to transfer the address byte or bytes of the internal

memory address to be read. As a result, the read/write bit must be a 0. After receiving the I

C device address and

the read/write bit, the I

C slave device responds with an acknowledge bit. Also, after sending the internal memory

address byte or bytes, the TAS1020A device transmits another start condition followed by the I

C slave device

address and the read/write bit again. This time the read/write bit is a 1 indicating a read transfer. After receiving the

C device address and the read/write bit the I

C slave again responds with an acknowledge bit. Next, the I

C slave

device transmits the data byte from the memory address being read. After receiving the data byte, the TAS1020A

device transmits a not-acknowledge followed by a stop condition to complete the single byte data read transfer.

Start

Condition

Repeat Start Condition

Acknowledge

Not

Acknowledge

SDA

A0 R/W ACK A7

ACK

A0 R/W ACK D7

D0 ACK

I2C Device Address and

Read/Write Bit

Memory or Register Address

I2C Device Address and

Read/Write Bit

Data Byte

Stop

Condition

Figure 2鈥?6. Single Byte Read Transfer

2.2.14.5 Multiple Byte Read

A multiple byte data read transfer is identical to a single byte data read transfer except that multiple data bytes are

transmitted by the I

C slave device to the TAS1020A device as shown in Figure 2鈥?7. Except for the last data byte,

the TAS1020A device responds with an acknowledge bit after receiving each data byte.

Repeat Start

Condition

Start

Condition

Acknowledge

Not

Acknowledge

SDA

A0 R/W ACK A7

ACK

A0 R/W ACK D7

D0 ACK

I2C Device Address and

Read/Write Bit

Memory or Register Address

I2C Device Address and

Read/Write Bit

First Data Byte

Other

Data Bytes

Last Data Byte

Stop

Condition

Figure 2鈥?7. Multiple Byte Read Transfer

2鈥?6

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