ST10F269-T3
5 - INTERNAL FLASH MEMORY
5.1 - Overview
鈥?256K Byte on-chip Flash memory
鈥?Two possibilities of Flash mapping into the CPU
address space
鈥?Flash memory can be used for code and data
storage
鈥?32-bit, zero waitstate read access (62.5ns cycle
time at f
CPU
= 32MHz)
鈥?Erase-Program Controller (EPC) similar to
M29F400B STM鈥檚 stand-alone Flash memory
鈥?Word-by-Word Programmable (16碌s typical)
鈥?Data polling and Toggle Protocol for EPC
Status
鈥?Ready/Busy signal connected on XP2INT
interrupt line
鈥?Internal Power-On detection circuit
鈥?Memory Erase in blocks
鈥?One 16K Byte, two 8K Byte, one 32K Byte,
three 64K Byte blocks
鈥?Each block can
(1.5 second typical)
be
erased
separately
5.2 - Operational Overview
Read Mode
In standard mode (the normal operating mode)
the Flash appears like an on-chip ROM with the
same timing and functionality. The Flash module
offers a fast access time, allowing zero waitstate
access with CPU frequency up to 32MHz.
Instruction fetches and data operand reads are
performed with all addressing modes of the
ST10F269-T3 instruction set.
In order to optimize the programming time of the
internal Flash, blocks of 8K Bytes, 16K Bytes,
32K Bytes, 64K Bytes can be used. But the size of
the blocks does not apply to the whole memory
space, see details in Table 2.
Access to data of internal Flash can only be per-
formed with an inner protected program
鈥?Erase Suspend and Resume Modes
鈥?Read and Program another Block during erase
suspend
鈥?Single Voltage operation, no need of dedicated
supply pin
鈥?Low Power Consumption:
鈥?45mA max. Read current
鈥?60mA max. Program or Erase current
鈥?Automatic Stand-by-mode (50碌A maximum)
鈥?100,000 Erase-Program Cycles per block,
20 years of data retention time
鈥?Operating temperature: -40 to +125
o
C
鈥?Chip erase (8.5 second typical)
鈥?Each block can be separately protected
against programming and erasing
鈥?Each protected block can be temporary unpro-
tected
鈥?When enabled, the read protection prevents
access to data in Flash memory using a pro-
gram running out of the Flash memory space.
Table 2 :
256K Byte Flash Memory Block Organization
Block
0
1
2
3
4
5
6
Addresses (Segment 0)
00鈥?000h to 00鈥?FFFh
00鈥?000h to 00鈥?FFFh
00鈥?000h to 00鈥?FFFh
01鈥?000h to 01鈥橣FFFh
02鈥?000h to 02鈥橣FFFh
03鈥?000h to 03鈥橣FFFh
04鈥?000h to 04鈥橣FFFh
Addresses (Segment 1)
01鈥?000h to 01鈥?FFFh
01鈥?000h to 01鈥?FFFh
01鈥?000h to 01鈥?FFFh
01鈥?000h to 01鈥橣FFFh
02鈥?000h to 02鈥橣FFFh
03鈥?000h to 03鈥橣FFFh
04鈥?000h to 04鈥橣FFFh
Size (byte)
16K
8K
8K
32K
64K
64K
64K
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