ST10F269-T3 Datasheet

IC型号：
ST10F269-T3
PDF描述：
16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYT...
文件大小：
1513.42KB
PDF页数：
160页
芯片厂家：
STMICROELECTRONICS

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ST10F269-T3

Table 3 :

Instructions

Instruction

Mne Cycle

Addr.

Data

Read/Reset

Addr.

Data

Program Word

Addr.

Data

Addr.

Data

Chip Erase

Addr.

Data

Erase Suspend

Addr.

Data

Erase Resume

Set Block/Code

Protection

Data

Read

Protection

Status

Addr.

Data

Block

Temporary

Unprotection

Code

Temporary

Unprotection

Code

Temporary

Protection

BTU

Addr.

Data

Addr.

Data

Addr.

Data

xxA8h

x2A54h

xxA8h

MEM

FFFFh

MEM

FFFBh

xx54h

x15A8h

xx54h

xx90h

x2A54h

xxC1h

xxA8h

x2A54h

xx54h

x15A8h

xxC0h

x2A54h

Addr.

Data

Addr.

Cycle

xxF0h

x1554h

xxA8h

x1554h

xxA8h

x1554h

xxA8h

x1554h

xxA8h

xxB0h

xx30h

x2A54h

x2AA8h

xx54h

x2AA8h

xx54h

x2AA8h

xx54h

x2AA8h

xx54h

xxxxxh

xxF0h

x1554h

xxA0h

x1554h

xx80h

x1554h

xx80h

Read Memory Array until a new write

cycle is initiated

x1554h

xxA8h

x1554h

xxA8h

Read Data Polling or Tog-

gle bit until Program com-

pletes.

x2AA8h

xx54h

x2AA8h

xx54h

xx30h

x1554h

xx10h

BA鈥?/div>

xx30h

Note

Cycle

Read/Reset

Read Memory Array until a new write cycle is initiated

Block Erase

Read until Toggle stops, then read or program all data needed

from block(s) not being erased then Resume Erase.

Read Data Polling or Toggle bit until Erase completes or Erase is

suspended another time.

x15A8h

x2A54h

Any odd

word

address

WPR

Any odd

word

address

Read PR

xxF0h

Read Protection Register

until a new write cycle is

initiated.

CTU

Write cycles must be executed from Flash.

CTP

Write cycles must be executed from Flash.

Notes 1. Address bit A14, A15 and above are don鈥檛 care for coded address inputs.

2. X = Don鈥檛 Care.

3. WA = Write Address: address of memory location to be programmed.

4. WD = Write Data: 16-bit data to be programmed

5. Optional, additional blocks addresses must be entered within a time-out delay (96 碌s) after last write entry, time-out status can be

verified through FSB.3 value. When full command is entered, read Data Polling or Toggle bit until Erase is completed or suspended.

6. Read Data Polling or Toggle bit until Erase completes.

7. WPR = Write protection register. To protect code, bit 15 of WPR must be 鈥?鈥? To protect block N (N=0,1,...), bit N of WPR must be

鈥?鈥? Bit that are already at 鈥?鈥?in protection register must also be 鈥?鈥?in WPR, else a writing error will occurs (it is not possible to write a

鈥?鈥?in a bit already programmed at 鈥?鈥?.

8. MEM = any address inside the Flash memory space. Absolute addressing mode must be used (MOV MEM, Rn), and instruction

must be executed from Flash memory space.

9. Odd word address = 4n-2 where n = 0, 1, 2, 3..., ex. 0002h, 0006h...

24/160

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