Contents
Chapter Revision Dates .......................................................................... vii
About This Handbook .............................................................................. ix
How to Find Information ........................................................................................................................ ix
How to Contact Altera ............................................................................................................................. ix
Typographic Conventions ........................................................................................................................ x
Section I. Stratix Device Family Data Sheet
Revision History ............................................................................................................................ Part I鈥?
Chapter 1. Introduction
Introduction ............................................................................................................................................ 1鈥?
Features ................................................................................................................................................... 1鈥?
Chapter 2. Stratix Architecture
Functional Description .......................................................................................................................... 2鈥?
Logic Array Blocks ................................................................................................................................ 2鈥?
LAB Interconnects ............................................................................................................................ 2鈥?
LAB Control Signals ......................................................................................................................... 2鈥?
Logic Elements ....................................................................................................................................... 2鈥?
LUT Chain & Register Chain .......................................................................................................... 2鈥?
addnsub Signal ................................................................................................................................. 2鈥?
LE Operating Modes ........................................................................................................................ 2鈥?
Clear & Preset Logic Control ........................................................................................................ 2鈥?3
MultiTrack Interconnect ..................................................................................................................... 2鈥?4
TriMatrix Memory ............................................................................................................................... 2鈥?1
Memory Modes ............................................................................................................................... 2鈥?2
Clear Signals .................................................................................................................................... 2鈥?4
Parity Bit Support ........................................................................................................................... 2鈥?4
Shift Register Support .................................................................................................................... 2鈥?5
Memory Block Size ......................................................................................................................... 2鈥?6
Independent Clock Mode .............................................................................................................. 2鈥?4
Input/Output Clock Mode ........................................................................................................... 2鈥?6
Read/Write Clock Mode ............................................................................................................... 2鈥?9
Single-Port Mode ............................................................................................................................ 2鈥?1
Multiplier Block .............................................................................................................................. 2鈥?7
Adder/Output Blocks ................................................................................................................... 2鈥?1
Modes of Operation ....................................................................................................................... 2鈥?4
Altera Corporation
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