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LH543601P-20 Datasheet

  • LH543601P-20

  • 256 x 36 x 2 Bidirectional FIFO

  • 361.29KB

  • 43页

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256
脳
36
脳
2 Bidirectional FIFO
LH543601
PORT B WORD-WIDTH SELECTION
36-Bit Data Stream
D
35A
18
D
18A
Bits 18-35
(2nd Halfword)
18-Bit Data Streams
D
35B
18
2nd Halfword, then 1st Halfword
D
18B
Bits
(2n 18-35
dH
alfw
ord
)
PORT
A
D
17A
18
D
0A
Bits 0-17
(1st Halfword)
7
0-1 ord)
Bits Halfw
(1st
PORT
B
D
17B
18
D
0B
543601-32
1st Halfword, then 2nd Halfword
Figure 6a. 36-to-18 Funneling Through FIFO #1
36-Bit Data Stream
D
35A
9
D
27A
Bits 27-35
(4th Byte)
9-Bit Data Streams
D
35B
9
D
27B
4th Byte, then 1st Byte, then 2nd Byte, then 3rd Byte
D
26A
9
D
18A
Bits 18-26
(3rd Byte)
D
26B
9
D
18B
3rd Byte, then 4th Byte, then 1st Byte, then 2nd Byte
PORT
A
D
17A
9
D
9A
Bits 9-17
(2nd Byte)
D
17B
9
D
9B
PORT
B
2nd Byte, then 3rd Byte, then 4th Byte, then 1st Byte
D
8A
9
D
0A
Bits 0-8
(1st Byte)
D
8B
9
D
0B
543601-34
1st Byte, then 2nd Byte, then 3rd Byte, then 4th Byte
Figure 6b. 36-to-9 Funneling Through FIFO #1
NOTES:
1. The heavy black borders on register segments indicate the main
data path, suitable for most applications. Alternate paths feature
a different ordering of bytes within a word, at Port B.
2. The funneling process does not change the ordering of bits within
a byte. Halfwords (Figure 6a) or bytes (Figure 6b) are trans-
ferred in parallel form from Port A to Port B.
3. The word-width setting may be changed during system operation;
however, two clock intervals should be allowed for these signals
to settle, before again attempting to read D
0B
鈥?D
35B
, and three
dummy words should be passed through initially. Also, incom-
plete data words may occur, when the word width is changed
from shorter to longer at an inappropriate point in the data block
passing through the FIFO.
15

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