ADSP-2185
Parameter
Interrupts and Flag
Timing Requirements:
t
IFS
IRQx,
FI, or PFx Setup before CLKOUT Low
1, 2, 3, 4
t
IFH
IRQx,
FI, or PFx Hold after CLKOUT High
1, 2, 3, 4
Switching Characteristics:
t
FOH
Flag Output Hold after CLKOUT Low
5
t
FOD
Flag Output Delay from CLKOUT Low
5
Min
Max
Unit
0.25 t
CK
+ 15
0.25 t
CK
0.5 t
CK
鈥?7
0.25 t
CK
+ 5
ns
ns
ns
ns
NOTES
1
If
IRQx
and FI inputs meet t
IFS
and t
IFH
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
the following cycle. (Refer to 鈥淚nterrupt Controller Operation鈥?in the Program Control chapter of the
ADSP-2100 Family User鈥檚 Manual
for further information on
interrupt servicing.)
2
Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3
IRQx
=
IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQE.
4
PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
5
Flag outputs = PFx, FL0, FL1, FL2, Flag_out
4
.
t
FOD
CLKOUT
t
FOH
FLAG
OUTPUTS
t
IFH
IRQx
FI
PFx
t
IFS
Figure 15. Interrupts and Flags
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