PIC16F648A Datasheet

IC型号：
PIC16F648A
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Flash-Based, 8-Bit CMOS Microcontrollers with nano Watt Tech...
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PIC16F627A/628A/648A

9.3.2

PWM DUTY CYCLE

The PWM duty cycle is specified by writing to the

CCPR1L register and to the CCP1CON<5:4> bits. Up

to 10-bit resolution is available: the CCPR1L contains

the eight MSbs and the CCP1CON<5:4> contains the

two LSbs. This 10-bit value is represented by

CCPR1L:CCP1CON<5:4>. The following equation is

used to calculate the PWM duty cycle in time:

PWM duty cycle =

(CCPR1L:CCP1CON<5:4>)

鈰?/div>

Tosc

鈰?/div>

TMR2 prescale

value

CCPR1L and CCP1CON<5:4> can be written to at any

time, but the duty cycle value is not latched into

CCPR1H until after a match between PR2 and TMR2

occurs (i.e., the period is complete). In PWM mode,

CCPR1H is a read-only register.

The CCPR1H register and a 2-bit internal latch are

used to double buffer the PWM duty cycle. This double

buffering is essential for glitch less PWM operation.

When the CCPR1H and 2-bit latch match TMR2 con-

catenated with an internal 2-bit Q clock or 2 bits of the

TMR2 prescaler, the CCP1 pin is cleared.

Maximum PWM resolution (bits) for a given PWM

frequency:

Fosc

log

铮?/div>

-------------------------------------------------------------

铮?/div>

PWM

铮?/div>

Fpwm

脳

TMR2 Prescaler

铮?/div>

Resolution = -------------------------------------------------------------------------- bits

log(2)

Note:

If the PWM duty cycle value is longer than

the PWM period the CCP1 pin will not be

cleared.

For an example PWM period and duty cycle calcula-

tion, see the PICmicro鈩?Mid-Range Reference Man-

ual (DS33023).

9.3.3

SET-UP FOR PWM OPERATION

The following steps should be taken when configuring

the CCP module for PWM operation:

Set the PWM period by writing to the PR2 regis-

ter.

Set the PWM duty cycle by writing to the

CCPR1L register and CCP1CON<5:4> bits.

Make the CCP1 pin an output by clearing the

TRISB<3> bit.

Set the TMR2 prescale value and enable Timer2

by writing to T2CON.

Configure the CCP1 module for PWM operation.

TABLE 9-3:

EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz

PWM Frequency

1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz

0xFF

0x3F

0x1F

0x17

6.5

Timer Prescaler (1, 4, 16)

PR2 Value

Maximum Resolution (bits)

TABLE 9-4:

Address

REGISTERS ASSOCIATED WITH PWM AND TIMER2

Bit 7

GIE

EEIF

EEIE

Name

Bit 6

PEIE

CMIF

CMIE

Bit 5

T0IE

RCIF

RCIE

Bit 4

INTE

TXIF

TXIE

Bit 3

RBIE

鈥?/div>

Bit 2

T0IF

CCP1IF

CCP1IE

Bit 1

INTF

TMR2IF

TMR2IE

Bit 0

RBIF

TMR1IF

TMR1IE

Value on

POR

0000 000x

0000 -000

1111 1111

0000 0000

1111 1111

-000 0000

xxxx xxxx

Value on

all other

RESETS

0000 000u

0000 -000

1111 1111

0000 0000

1111 1111

uuuu uuuu

--00 0000

0Bh, 8Bh,

INTCON

10Bh, 18Bh

0Ch

8Ch

86h, 186h

11h

92h

12h

15h

16h

17h

Legend:

PIR1

PIE1

TRISB

TMR2

PR2

T2CON

CCPR1L

CCPR1H

CCP1CON

PORTB Data Direction Register

Timer2 module鈥檚 register

Timer2 module鈥檚 period register

鈥?/div>

TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0

TMR2ON T2CKPS1 T2CKPS0

Capture/Compare/PWM register1 (LSB)

Capture/Compare/PWM register1 (MSB)

鈥?/div>

CCP1X

CCP1Y

CCP1M3

CCP1M2

CCP1M1

CCP1M0

--00 0000

= unknown,

= unchanged,

= unimplemented read as '0'. Shaded cells are not used by PWM and Timer2.

铮?/div>

2002 Microchip Technology Inc.

Preliminary

DS40044A-page 59

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