ST72260G, ST72262G, ST72264G
Pin n掳
Type
SDIP32
SO28
BGA
Pin Name
Level
Output
Input
Port / Control
Input
float
wpu
ana
int
OD
PP
Main
Output Function
(after
reset)
X
X
X
X
T
X
T
X
X
X
X
X
Port C2
Port C1
Port C0
Port A7
Port A6
Port A5
Port A4
Alternate Function
17
18
19
20
21
22
23
24
25
15 E3 PC2/MCO/AIN2
16 F4 PC1/OCMP1_B/AIN1
17 D3 PC0/ICAP1_B/AIN0
18 E4 PA7/TDO
19 F5 PA6/SDAI
20 F6 PA5 /RDI
21 E6 PA4/SCLI
E5 NC
D6 NC
D5 NC
I/O
I/O
I/O
C
T
C
T
C
T
X
ei0/ei1 X
X
ei0/ei1 X
X
ei0/ei1 X
X
X
X
X
ei0
ei0
ei0
ei0
Main clock output (f
CPU
) or
ADC Analog Input 2
Timer B Output Compare 1 or
ADC Analog Input 1
Timer B Input Capture 1 or
ADC Analog Input 0
SCI output
I
2
C DATA
SCI input
I
2
C CLOCK
I/O C
T
HS
I/O C
T
HS
I/O C
T
HS
I/O C
T
HS
Not Connected
26
27
22 C6 PA3
23 D4 PA2
C5 NC
I/O C
T
HS
I/O C
T
HS
X
X
ei0
ei0
X
X
X
X
Port A3
Port A2
Not Connected
B6 NC
28
29
30
31
32
24 A6 PA1/ICCDATA
25 A5 PA0/ICCCLK
26 B5 ICCSEL
27 A4 V
SS
28 B4 V
DD
I/O C
T
HS
I/O C
T
HS
I
S
S
C
T
X
X
X
ei0
ei0
X
X
X
X
Port A1
Port A0
In Circuit Communication Data
In Circuit Communication
Clock
ICC mode pin, must be tied low
Ground
Main power supply
Notes:
1. In the interrupt input column, 鈥渆iX鈥?defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is a pull-up interrupt in-
put, otherwise the configuration is a floating interrupt input. Port C is mapped to ei0 or ei1 by option byte.
2. In the open drain output column, 鈥淭鈥?defines a true open drain I/O (P-Buffer and protection diode to V
DD
are not implemented). See
Section 9 "I/O PORTS" on page 38
for more details.
3. OSC1 and OSC2 pins connect a crystal or ceramic resonator, an external RC, or an external source to
the on-chip oscillator see
Section 2 "PIN DESCRIPTION" on page 6
and
Section 6.2 "MULTI-OSCILLA-
TOR (MO)" on page 21
for more details.
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