PSD835G2
Configurable Memory System on a Chip
for 8-Bit Microcontrollers
PRELIMINARY DATA
FEATURES SUMMARY
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5 V卤10% Single Supply Voltage:
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Figure 1. Packages
Up to 4 Mbit of Primary Flash Memory (8
uniform sectors)
256Kbit Secondary Flash Memory (4 uniform
sectors)
Up to 64 Kbit SRAM
Over 3,000 Gates of PLD: DPLD and CPLD
52 Reconfigurable I/O ports
Enhanced JTAG Serial Port
Programmable power management
High Endurance:
鈥?100,000 Erase/Write Cycles of Flash Memory
鈥?1,000 Erase/Write Cycles of PLD
TQFP80 (U)
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January 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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