PSD813F2 Datasheet

IC型号：
PSD813F2
PDF描述：
FLASH IN-SYSTEM PROGRAMMABLE (ISP) PERIPHERALS FOR 8-BIT MCU...
文件大小：
1180.57KB
芯片厂家：
STMicroelectronics

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PSD8XX Family

PSD835G2

The PSD835G2 device offers two methods to program PSD Flash memory while the PSD

is soldered to a circuit board.

1.0

Introduction

(Cont.)

In-System Programming (ISP) via JTAG

An IEEE 1149.1 compliant JTAG-ISP interface is included on the PSD enabling the

entire device (both flash memories, the PLD, and all configuration) to be rapidly

programmed while soldered to the circuit board. This requires no MCU participation,

which means the PSD can be programmed anytime, even while completely blank.

The innovative JTAG interface to flash memories is an industry first, solving key

problems faced by designers and manufacturing houses, such as:

鈥?/div>

First time programming 鈥?/div>

How do I get firmware into the flash the very first time?

JTAG is the answer, program the PSD while blank with no MCU involvement.

鈥?/div>

Inventory build-up of pre-programmed devices 鈥?/div>

How do I maintain an accurate

count of pre-programmed flash memory and PLD devices based on customer

demand? How many and what version? JTAG is the answer, build your hardware

with blank PSDs soldered directly to the board and then custom program just before

they are shipped to customer. No more labels on chips and no more wasted

inventory.

鈥?/div>

Expensive sockets 鈥?/div>

How do I eliminate the need for expensive and unreliable

sockets? JTAG is the answer. Solder the PSD directly to the circuit board. Program

first time and subsequent times with JTAG. No need to handle devices and bend the

fragile leads.

In-Application re-Programming (IAP)

Two independent flash memory arrays are included so the MCU can execute code

from one memory while erasing and programming the other. Robust product firmware

updates in the field are possible over any communication channel (CAN, Ethernet,

UART, J1850, etc) using this unique architecture. Designers are relieved of these

problems:

鈥?/div>

Simultaneous read and write to flash memory 鈥?/div>

How can the MCU program the

same memory from which it is executing code? It cannot. The PSD allows the MCU

to operate the two flash memories concurrently, reading code from one while erasing

and programming the other during IAP.

鈥?/div>

Complex memory mapping 鈥?/div>

How can I map these two memories efficiently?

A Programmable Decode PLD is embedded in the PSD. The concurrent PSD

memories can be mapped anywhere in MCU address space, segment by segment

with extremely high address resolution. As an option, the secondary flash memory

can be swapped out of the system memory map when IAP is complete. A built-in

page register breaks the MCU address limit.

鈥?/div>

Separate program and data space 鈥?/div>

How can I write to flash memory while it

resides in 鈥減rogram鈥?space during field firmware updates, my 80C51 won鈥檛 allow it

The flash PSD provides means to 鈥渞eclassify鈥?flash memory as 鈥渄ata鈥?space during

IAP, then back to 鈥減rogram鈥?space when complete.

PSDsoft 鈥?ST鈥檚 software development tool 鈥?guides you through the design

process step-by-step making it possible to complete an embedded MCU design

capable of ISP/IAP in just hours. Select your MCU and PSDsoft will take you through

the remainder of the design with point and click entry, covering...PSD selection, pin

definitions, programmable logic inputs and outputs, MCU memory map definition, ANSI C

code generation for your MCU, and merging your MCU firmware with the PSD design.

When complete, two different device programmers are supported directly from PSDsoft 鈥?/div>

FlashLINK (JTAG) and PSDpro.

The PSD835G2 is available in an 80-pin TQFP package.

Please refer to the revision block at the end of this

document for updated information.

prev next

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