HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
Functional Description
CAS Latency = 2
CK
CK
Command
Address
Read
BAa, COL n
NOP
BST
NOP
NOP
NOP
CL=2
DQS
DQ
DOa-n
No further output data after this point.
DQS tristated.
CAS Latency = 2.5
CK
CK
Command
Address
Read
BAa, COL n
NOP
BST
NOP
NOP
NOP
CL=2.5
DQS
DQ
DOa-n
No further output data after this point.
DQS tristated.
DO a-n = data out from bank a, column n.
Cases shown are bursts of 8 terminated after 4 data elements.
3 subsequent elements of data out appear in the programmed order following DO a-n.
Shown with nominal t
AC
, t
DQSCK
, and t
DQSQ
.
Don鈥檛 Care
Figure 14
Terminating a Read Burst: CAS Latencies (Burst Length = 8)
Data Sheet
38
Rev. 1.6, 2004-12