HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
Functional Description
T1
CK
CK
Command
Write
T2
T3
T4
T5
T6
NOP
NOP
NOP
PRE
NOP
t
WR
Address
BA a, COL b
BA (a or all)
t
DQSS
(nom)
DQS
DQ
DM
DI a-b
2
t
RP
3
3
1
1
DI a-b = Data In for bank a, column b.
An interrupted burst is shown, 2 data elements are written.
1 subsequent element of data in is applied in the programmed order following DI a-b.
t
WR
is referenced from the first positive CK edge after the last desired data in pair.
The Precharge command masks the last 2 data elements in the burst.
A10 is Low with the Write command (Auto Precharge is disabled).
1 = Can be don't care for programmed burst length of 4.
2 = For programmed burst length of 4, DQS becomes don't care at this point.
3 = These bits are incorrectly written into the memory array if DM is low.
Don鈥檛 Care
Figure 29
Write to Precharge: Nominal DQSS (2-bit Write), Interrupting (Burst Length = 4 or 8)
Data Sheet
54
Rev. 1.6, 2004-12