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HYB25D256800CL-6 Datasheet

  • HYB25D256800CL-6

  • 256 Mbit Double Data Rate SDRAM

  • 3260.54KB

  • 94页

  • INFINEON   INFINEON

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HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
System Characteristics for DDR SDRAMs
Table 29
Output Slew Rate Characteristrics (脳4,
脳8
Devices only)
Typical Range (V/ns) Minimum (V/ns)
1.2 鈥?2.5
1.2 鈥?2.5
1.0
1.0
Maximum (V/ns) Notes
4.5
4.5
1)2)3)4)5)6)
2)3)4)5)7)
Slew Rate Characteristic
Pullup Slew Rate
Pulldown Slew Rate
Table 30
Output Slew Rate Characteristics (脳16 Devices only)
Typical Range (V/ns)
1.2 鈥?2.5
1.2 鈥?2.5
Minimum (V/ns)
0.7
0.7
Maximum(V/ns)
5.0
5.0
Notes
1)2)3)4)5)6)
2)3)4)5)7)
Slew Rate Characteristic
Pullup Slew Rate
Pulldown Slew Rate
1) Pullup slew rate is characterizted under the test conditions as shown in
Figure 52
2) Pullup slew rate is measured between (
V
DDQ
/2 鈥?320 mV 卤 250 mV)
Pulldown slew rate is measured between (
V
DDQ
/2 + 320 mV 卤 250mV)
Pullup and Pulldown slew rate conditions are to be met for any pattern of data, including all outputs switching and only one
output switching.Example: For typical slew rate, DQ0 is switching.For minimum slew rate, all DQ bits are switchiung worst
case pattern. For maximum slew rate, only one DQ is switching from either high to low, or low to high the remainig DQ bits
remain the same as previous state.
3) Evaluation conditions: Typical: 25 掳C (T Ambient),
V
DDQ
= nominal, typical process.Minimum: 70 掳C (T Ambient),
minimum, slow 鈥?slow process. Maximum: 0 掳C (T Ambient),
V
DDQ
= maximum, fast 鈥?fast process
4) Verified under typical conditions for qualification purposes.
5) TSOP II package devices only.
6) Only intended for operation up to 266 Mbps per pin.
7) Pulldown slew rate is measured under the test conditions shown in
Figure 53.
V
DDQ
=
Table 31
Parameter
Output Slew Rate Matching Ratio Characteristics
DDR266A
鈥?/div>
DDR266B
鈥?/div>
鈥?/div>
DDR200
Max.
1.4
1) 2)
Slew Rate Characteristic
Notes
Min. Max. Min. Max. Min.
0.71
Output SLew Rate Matching Ratio (Pullup to Pulldown) 鈥?/div>
1) The ratio of pullup slew rate to pulldown slew rate is specified for the same temperature and voltage, over the entire
temperature and voltage range. For a given output, it represents the maximum difference between pullup and pulldown
drivers due to process variation.
2) DQS, DM, and DQ input slew rate is specified to prevent double clocking of data and preserve setup and hold times.
Signal transitions through the DC region must be monotonic
9
''4

2XWSXW
7HVW SRLQW
03%'
Figure 52
Pullup slew rate test load
2XWSXW

9
664
03%'
7HVW SRLQW
Figure 53
Pulldown slew rate test load
Data Sheet
91
Rev. 1.6, 2004-12
08012003-8754-PAQX

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