Power
Power
Power
Ground
Ground
V
DD_IO
V
DDA_OSC_PLL
V
DDA_ADC
V
SS
V
SSA_ADC
OCR_DIS
7
1
1
6
1
1
4
2
1
1
1
1
6
2
8
8
1
1
1
1
7
9
1
1
1
1
1
1
1
PHASEA0 (TA0, GPIOC4)
PHASEB0 (TA1, GPIOC5)
INDEX0 (TA2, GPIOC6)
HOME0 (TA3, GPIOC7)
SCLK0
MOSI0 (GPIOE5)
MISO0 (GPIOE6)
SS0 (GPIOE7)
PHASEA1(TB0, SCLK1, GPIOC0)
PHASEB1 (TB1, MOSI1, GPIOC1)
INDEX1 (TB2, MISO1, GPIOC2)
HOME1 (TB3, SS1, GPIOC3)
PWMA0 - 5
ISA0 - 2 (GPIOC8 - 10)
FAULTA0 - 3
Quadrature
Decoder 0
or Quad
Timer A
56F8367
1
1
1
1
1
1
1
1
6
3
4
Other
Supply
Ports
PLL
and
Clock
*V
CAP
1 - V
CAP
4
V
PP
1 & V
PP
2
CLKMODE
EXTAL
XTAL
CLKO
A0 - A5 (GPIOA8 - 13)
A6 - A7 (GPIOE2 - 3)
A8 - A15 (GPIOA0 - 7)
GPIOB0 - 7 (A16 - 23)
GPIOB4 (A20, prescaler_clock)
GPIOB5 (A21, SYS_CLK)
GPIOB6 (A22, SYS_CLK2)
GPIOB7 (A23, oscillator_clock)
SPI0 or
GPIO
Quadrature
Decoder 1 or
Quad Timer B
or SPI 1 or
GPIO
External
Address
Bus
or GPIO
PWMA
6
3
4
PWMB0 - 5
ISB0 - 2 (GPIOD10 - 12)
FAULTB0 - 3
PWMB
External
Data Bus
D0 - D6 (GPIOF9 - 15)
D7 - D15 (GPIOF0 - 8)
RD
WR
PS/CS0 (GPIODF8)
8
5
8
ANA0 - 7
V
REF
ANB0 - 7
ADCA
ADCB
External
Bus
Control
1
Temp_Sense
Temperature
Sense
DS/CS1 (GPIOFD9)
GPIOD0 (CS2, CAN2_TX)
GPIOD1 (CS3, CAN2_RX)
GPIOD2 - 5 (CS4 - 7)
1
1
1
4
1
1
1
1
1
1
1
1
1
2
4
1
1
CAN_RX
CAN_TX
FlexCAN
SCI 0 or
GPIO
SCI 1 or
GPIOD
TXD0 (GPIOE0)
RXD0 (GPIOE1)
TXD1 (GPIOD6)
RXD1 (GPIOD7)
TCK
TMS
TDI
TDO
TRST
TC0 - 1 (GPIOE8 - 9)
TD0 - 3 (GPIOE10 - 13)
Quad Timer
C and D or
GPIO
1
1
1
1
1
1
IRQA
IRQB
EXTBOOT
EMI_MODE
RESET
RSTO
INTERRUPT/
PROGRAM
CONTROL
JTAG/
EOnCE
Port
* When the on-chip regulator is disabled, these four pins become 2.5V V
DD_CORE
.
Figure 2-1 56F8367 Signals Identified by Functional Group
1
(160-pin LQFP)
1. Alternate pin functionality is shown in parenthesis; pin direction/type shown is the default functionality.
56F8367 Technical Data, Rev. 3.0
16
Freescale Semiconductor
Preliminary