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MC56F8367MPYE Datasheet

  • MC56F8367MPYE

  • 16-bit Digital Signal Controllers

  • 2743.16KB

  • 180页

  • FREESCALE

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Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA
Signal
Name
CLKO
Pin
No.
3
Ball No.
Type
State
During
Reset
Signal Description
D3
Output
Tri-Stated
Clock Output
鈥?This pin outputs a buffered clock signal. Using the
SIM CLKO Select Register (SIM_CLKOSR), this pin can be
programmed as any of the following: disabled, CLK_MSTR (system
clock), IPBus clock, oscillator output, prescaler clock and postscaler
clock. Other signals are also available for test purposes.
See
Part 6.5.7
for details.
A0
154
C3
Output
Tri-stated
Address Bus
鈥?A0 - A5 specify six of the address lines for external
program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control register
(BCR), A0 - A5 and EMI control signals are tri-stated when the external
bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
(GPIOA8)
A1
(GPIOA9)
A2
(GPIOA10)
A3
(GPIOA11)
A4
(GPIOA12)
A5
(GPIOA13)
A6
10
E3
Input/
Output
Input
Port A GPIO
鈥?These six GPIO pins can be individually programmed
as input or output pins.
After reset, the default state is Address Bus.
11
E4
To deactivate the internal pull-up resistor, clear the appropriate GPIO
bit in the GPIOA_PUR register.
Example: GPIOA8, clear bit 8 in the GPIOA_PUR register.
12
F2
13
F1
14
F3
17
G1
Output
Tri-stated
Address Bus
鈥?A6 - A7 specify two of the address lines for external
program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control register
(BCR), A6 - A7 and EMI control signals are tri-stated when the external
bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
(GPIOE2)
A7
(GPIOE3)
18
G3
Schmitt
Input/
Output
Input
Port E GPIO
鈥?These two GPIO pins can be individually programmed
as input or output pins.
After reset, the default state is Address Bus.
To deactivate the internal pull-up resistor, clear the appropriate GPIO
bit in the GPIOE_PUR register.
Example: GPIOE2, clear bit 2 in the GPIOE_PUR register.
56F8367 Technical Data, Rev. 3.0
20
Freescale Semiconductor
Preliminary

MC56F8367MPYE 产品属性

  • 40

  • 集成电路 (IC)

  • 嵌入式 - 微控制器，

  • 56F8xxx

  • 56800E

  • 16-位

  • 60MHz

  • CAN，EBI/EMI，SCI，SPI

  • POR，PWM，温度传感器，WDT

  • 76

  • 544KB（272K x 16）

  • 闪存

  • -

  • 18K x 16

  • 2.25 V ~ 3.6 V

  • A/D 16x12b

  • 外部

  • -40°C ~ 125°C

  • 160-LQFP

  • 托盘

  • MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X

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