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MC56F8367MPYE Datasheet

  • MC56F8367MPYE

  • 16-bit Digital Signal Controllers

  • 2743.16KB

  • 180页

  • FREESCALE

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Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA
Signal
Name
GPIOB0
Pin
No.
33
Ball No.
Type
State
During
Reset
Input
Signal Description
L1
Schmitt
Input/
Output
Output
Port B GPIO
鈥?These four GPIO pins can be programmed as input or
output pins.
(A16)
GPIOB1
(A17)
GPIOB2
(A18)
GPIOB3
(A19)
34
L3
Tri-stated
Address Bus
鈥?A16 - A19 specify one of the address lines for
external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control register
(BCR), A16 - A19 and EMI control signals are tri-stated when the external
bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
After reset, the startup state of GPIOB0 - GPIOB3 (GPIO or address)
is determined as a function of EXTBOOT, EMI_MODE and the Flash
security setting. See
Table 4-4
for further information on when this pin
is configured as an address pin at reset. In all cases, this state may be
changed by writing to GPIOB_PER.
To deactivate the internal pull-up resistor, clear the appropriate GPIO
bit in the GPIOB_PUR register.
35
L2
36
M1
GPIOB4
37
M2
Schmitt
Input/
Output
Output
Input
Port B GPIO
鈥?These four GPIO pins can be programmed as input or
output pins.
(A20)
Tri-stated
Address Bus
鈥?A20 - A23 specify one of the address lines for
external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control register
(BCR), A20鈥揂23 and EMI control signals are tri-stated when the external
bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
(prescaler_
clock)
GPIOB5
(A21)
(SYS_CLK)
GPIOB6
(A22)
(SYS_CLK2
)
GPIOB7
(A23)
(oscillator_
clock)
46
N4
Output
Output
Clock Outputs
鈥?can be used to monitor the prescaler_clock,
SYS_CLK, SYS_CLK2 or oscillator_clock on GPIOB4 through
GPIOB7, respectively.
After reset, the default state is GPIO.
47
P3
These pins can also be used to extend the external address bus to its
full length or to view any of several system clocks. In these cases, the
GPIO_B_PER can be used to individually disable the GPIO. The
CLKOSR register in the SIM ( see
Part 6.5.7)
can then be used to
choose between address and clock functions.
48
M4
56F8367 Technical Data, Rev. 3.0
22
Freescale Semiconductor
Preliminary

MC56F8367MPYE 产品属性

  • 40

  • 集成电路 (IC)

  • 嵌入式 - 微控制器，

  • 56F8xxx

  • 56800E

  • 16-位

  • 60MHz

  • CAN，EBI/EMI，SCI，SPI

  • POR，PWM，温度传感器，WDT

  • 76

  • 544KB（272K x 16）

  • 闪存

  • -

  • 18K x 16

  • 2.25 V ~ 3.6 V

  • A/D 16x12b

  • 外部

  • -40°C ~ 125°C

  • 160-LQFP

  • 托盘

  • MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X

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