您的位置：维库电子市场网 > Datasheet > MC56F8367MPYE

MC56F8367MPYE Datasheet

  • MC56F8367MPYE

  • 16-bit Digital Signal Controllers

  • 2743.16KB

  • 180页

  • FREESCALE

阅览下载 纠错 0

扫码查看芯片数据手册

上传产品规格书

PDF预览

Signal Pins
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA
Signal
Name
WR
Pin
No.
51
Ball No.
Type
State
During
Reset
Signal Description
L4
Output
Tri-stated
Write Enable
鈥?WR is asserted during external memory write cycles.
When WR is asserted low, pins D0 - D15 become outputs and the
device puts data on the bus. When WR is deasserted high, the
external data is latched inside the external device. When WR is
asserted, it qualifies the A0 - A23, PS, DS, and CSn pins. WR can be
connected directly to the WE pin of a static RAM.
Depending upon the state of the DRV bit in the EMI bus control register
(BCR), WR is tri-stated when the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
To deactivate the internal pull-up resistor, set the CTRL bit in the
SIM_PUDR register.
PS
(CS0)
53
N6
Output
Tri-stated
Program Memory Select
鈥?This signal is actually CS0 in the EMI,
which is programmed at reset for compatibility with the 56F80x PS
signal. PS is asserted low for external program memory access.
Depending upon the state of the DRV bit in the EMI bus control register
(BCR), CS0 is tri-stated when the external bus is inactive.
CS0 resets to provide the PS function as defined on the 56F80x
devices.
(GPIOD8)
Input/
Output
Input
Port D GPIO
鈥?This GPIO pin can be individually programmed as an
input or output pin.
To deactivate the internal pull-up resistor, clear bit 8 in the
GPIOD_PUR register.
DS
(CS1)
54
L5
Outpu
Tri-stated
Data Memory Select
鈥?This signal is actually CS1 in the EMI, which
is programmed at reset for compatibility with the 56F80x DS signal. DS
is asserted low for external data memory access.
Depending upon the state of the DRV bit in the EMI bus control register
(BCR), CS1 is tri-stated when the external bus is inactive.
CS1 resets to provide the DS function as defined on the 56F80x
devices.
(GPIOD9)
Input/
Outputt
Input
Port D GPIO
鈥?This GPIO pin can be individually programmed as an
input or output pin.
To deactivate the internal pull-up resistor, clear bit 9 in the
GPIOD_PUR register.
56F8367 Technical Data, Rev. 3.0
Freescale Semiconductor
Preliminary
25

MC56F8367MPYE 产品属性

  • 40

  • 集成电路 (IC)

  • 嵌入式 - 微控制器，

  • 56F8xxx

  • 56800E

  • 16-位

  • 60MHz

  • CAN，EBI/EMI，SCI，SPI

  • POR，PWM，温度传感器，WDT

  • 76

  • 544KB（272K x 16）

  • 闪存

  • -

  • 18K x 16

  • 2.25 V ~ 3.6 V

  • A/D 16x12b

  • 外部

  • -40°C ~ 125°C

  • 160-LQFP

  • 托盘

  • MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X

MC56F8367MPYE相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

©2024 维库电子市场网（www.dzsc.com）　备案号：浙B2-20050339-1 经营许可证：浙B2-20210386版权声明
买家服务热线：0571-85317607 | 买家服务部QQ： QQ:1609526468
卖家服务热线：0571-85317607 | 卖家服务部QQ： QQ:331652727

扫码下载APP，
一键连接广大的电子世界。

在线人工客服

买家服务：
卖家服务：

0571-85317607

客服在线时间周一至周五
9:00-17:30

关注官方微信号，
第一时间获取资讯。

建议反馈
返回顶部

建议反馈

联系人：

联系方式：

按住滑块，拖拽到最右边
>>
感谢您向阿库提出的宝贵意见，您的参与是维库提升服务的动力！意见一经采纳，将有感恩红包奉上哦！

PDF纠错X

投诉电话：0571-85317607 投诉QQ：

如选匿名将无法为您反馈投诉结果，建议实名投诉！