Peripheral Memory Mapped Registers
Table 4-38 FlexCAN Registers Address Map (Continued)
(FC_BASE = $00 F800)
FlexCAN is NOT available in the 56F8167 device
Register Acronym
FCMB1_DATA
FCMB1_DATA
FCMB1_DATA
FCMB1_DATA
Address Offset
$4B
$4C
$4D
$4E
Register Description
Message Buffer 1 Data Register
Message Buffer 1 Data Register
Message Buffer 1 Data Register
Message Buffer 1 Data Register
Reserved
FCMB2_CONTROL
FCMB2_ID_HIGH
FCMB2_ID_LOW
FCMB2_DATA
FCMB2_DATA
FCMB2_DATA
FCMB2_DATA
$50
$51
$52
$53
$54
$55
$56
Message Buffer 2 Control / Status Register
Message Buffer 2 ID High Register
Message Buffer 2 ID Low Register
Message Buffer 2 Data Register
Message Buffer 2 Data Register
Message Buffer 2 Data Register
Message Buffer 2 Data Register
Reserved
FCMB3_CONTROL
FCMB3_ID_HIGH
FCMB3_ID_LOW
FCMB3_DATA
FCMB3_DATA
FCMB3_DATA
FCMB3_DATA
$58
$59
$5A
$5B
$5C
$5D
$5E
Message Buffer 3 Control / Status Register
Message Buffer 3 ID High Register
Message Buffer 3 ID Low Register
Message Buffer 3 Data Register
Message Buffer 3 Data Register
Message Buffer 3 Data Register
Message Buffer 3 Data Register
Reserved
FCMB4_CONTROL
FCMB4_ID_HIGH
FCMB4_ID_LOW
FCMB4_DATA
FCMB4_DATA
FCMB4_DATA
FCMB4_DATA
$60
$61
$62
$63
$64
$65
$66
Message Buffer 4 Control / Status Register
Message Buffer 4 ID High Register
Message Buffer 4 ID Low Register
Message Buffer 4 Data Register
Message Buffer 4 Data Register
Message Buffer 4 Data Register
Message Buffer 4 Data Register
Reserved
FCMB5_CONTROL
FCMB5_ID_HIGH
FCMB5_ID_LOW
$68
$69
$6A
Message Buffer 5 Control / Status Register
Message Buffer 5 ID High Register
Message Buffer 5 ID Low Register
56F8367 Technical Data, Rev. 3.0
Freescale Semiconductor
Preliminary
71