Register Descriptions
Add. Register
Offset Name
$10
$11
$12
$13
$14
$15
FIVAH1
IRQP0
IRQP1
IRQP2
IRQP3
IRQP4
R
W
R
W
R
W
R
W
R
W
R
W
R
W
Reserved
$1D
ICTL
Reserved
$1F
IPR10
R
W
R
W
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
3
2
1
0
FAST INTERRUPT 1 VECTOR
ADDRESS HIGH
1
PENDING [16:2]
PENDING [32:17]
PENDING [48:33]
PENDING [64:49]
PENDING [80:65]
$16
IRQP5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
PEND-
ING
[81]
INT
IPIC
VAB
INT_DIS
1
IRQB
IRQA
STATE STATE IRQB
EDG
IRQA
EDG
0
0
0
0
0
0
0
0
FLEXCAN2
MSGBUG IPL
FLEXCAN2
WKUP IPL
FLEXCAN2 ERR
IPL
FLEXCAN2
BOFF IPL
= Reserved
Figure 5-2 ITCN Register Map Summary
5.6.1
Interrupt Priority Register 0 (IPR0)
15
0
Base + $0
Read
Write
RESET
14
0
13
12
11
10
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
BKPT_U0IPL
0
0
0
0
STPCNT IPL
0
0
0
0
0
0
0
0
0
0
0
0
Figure 5-3 Interrupt Priority Register 0 (IPR0)
5.6.1.1
5.6.1.2
Reserved鈥擝its 15鈥?4
EOnCE Breakpoint Unit 0 Interrupt Priority Level (BKPT_U0 IPL)鈥?/div>
Bits13鈥?2
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
This field is used to set the interrupt priority levels for IRQs. This IRQ is limited to priorities 1 through 3.
It is disabled by default.
鈥?/div>
鈥?/div>
鈥?/div>
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
56F8367 Technical Data, Rev. 3.0
Freescale Semiconductor
Preliminary
85
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