74LV125 Datasheet

  • 74LV125

  • Quad buffer/line driver (3-State)

  • 121.19KB

  • Philips

扫码查看芯片数据手册

上传产品规格书

PDF预览

Philips Semiconductors
Product specification
Quad buffer/line driver (3-State)
74LV125
FEATURES
鈥?/div>
Wide operating voltage: 1.0 to 5.5 V
鈥?/div>
Optimized for Low Voltage applications: 1.0 to 3.6 V
鈥?/div>
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
鈥?/div>
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
鈥?/div>
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
鈥?/div>
Output capability: bus driver
鈥?/div>
I
CC
category: MSI
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25掳C; t
r
= t
f
鈮?/div>
2.5 ns
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
PARAMETER
Propagation delay
nA to nY
Input capacitance
Power dissipation capacitance per buffer
T
amb
= 25掳C.
T
amb
= 25掳C.
DESCRIPTION
The 74LV125 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT125.
The 74LV125 consists of four non-inverting buffers/line drivers with
3-state outputs. The 3-state outputs (nY) are controlled by the output
enable input (nOE). A HIGH at nOE causes the outputs to assume a
high impedance OFF-state.
CONDITIONS
C
L
= 15 pF;
V
CC
= 3.3 V
V
CC
= 3.3 V;
V
I
= GND to V
CC1
TYPICAL
9
3.5
22
UNIT
ns
pF
pF
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
碌W)
P
D
= C
PD
V
CC2
f
i
)
(C
L
V
CC2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC2
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIL
14-Pin Plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
鈥?0掳C to +125掳C
鈥?0掳C to +125掳C
鈥?0掳C to +125掳C
鈥?0掳C to +125掳C
OUTSIDE NORTH AMERICA
74LV125 N
74LV125 D
74LV125 DB
74LV125 PW
NORTH AMERICA
74LV125 N
74LV125 D
74LV125 DB
74LV125PW DH
PKG. DWG. #
SOT27-1
SOT108-1
SOT337-1
SOT402-1
PIN DESCRIPTION
PIN
NUMBER
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
14
SYMBOL
1OE 鈥?4OE
1A 鈥?4A
1Y 鈥?4Y
GND
V
CC
NAME AND FUNCTION
FUNCTION TABLE
INPUTS
nOE
Data enable inputs (active LOW)
Data inputs
Data Outputs
Ground (0 V)
Positive supply voltage
L
L
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = don鈥檛 care
Z = high impedance OFF-state
nA
L
H
X
OUTPUT
nY
L
H
Z
1998 Apr 28
2
853鈥?901 19290

74LV125相关型号PDF文件下载

  • 型号
    版本
    描述
    厂商
    下载
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [P...
  • 英文版
    Quad 2-input NOR gate
    Philips
  • 英文版
    Quad 2-input NAND gate
    Philips
  • 英文版
    Hex inverter
    Philips
  • 英文版
    Quad 2-input AND gate
    Philips
  • 英文版
    Triple 3-input NAND gate
    Philips
  • 英文版
    Triple 3-input AND gate
    Philips
  • 英文版
    Hex inverting Schmitt-trigger
    Philips
  • 英文版
    Dual 4-input NAND gate
    Philips
  • 英文版
    Triple 3-input NOR gate
    Philips
  • 英文版
    Quad 2-input OR gate
    Philips
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS [NXP Se...
  • 英文版
    Quad 2-input EXCLUSIVE-OR gate
    Philips
  • 英文版
    QUADRUPLE 2 INPUT POSITIVE NAND GATES
    TI [Texas ...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...

扫码下载APP,
一键连接广大的电子世界。

在线人工客服

买家服务:
卖家服务:

0571-85317607

客服在线时间周一至周五
9:00-17:30

关注官方微信号,
第一时间获取资讯。

建议反馈

联系人:

联系方式:

按住滑块,拖拽到最右边
>>
感谢您向阿库提出的宝贵意见,您的参与是维库提升服务的动力!意见一经采纳,将有感恩红包奉上哦!