93C66A/B
3.6
ERASE/WRITE Disable and Enable
(EWDS/EWEN)
3.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (93C66A) or 16-bit
(93C66B) output string. The output data bits will toggle
on the rising edge of the CLK and are stable after the
speci铿乪d time delay (T
PD
). Sequential read is possible
when CS is held high. The memory data will automati-
cally cycle to the next register and output sequentially.
The device powers up in the ERASE/WRITE Disable
(EWDS) state. All programming modes must be pre-
ceded by an ERASE/WRITE Enable (EWEN) instruc-
tion. Once the EWEN instruction is executed,
programming remains enabled until an EWDS instruc-
tion is executed or V
CC
is removed from the device. To
protect against accidental data disturbance, the EWDS
instruction can be used to disable all ERASE/WRITE
functions and should follow all programming opera-
tions. Execution of a READ instruction is independent
of both the EWEN and EWDS instructions.
FIGURE 3-4:
CS
EWDS TIMING
T
CSL
CLK
DI
1
0
0
0
0
X
鈥⑩€⑩€?/div>
X
FIGURE 3-5:
EWEN TIMING
T
CSL
CS
CLK
DI
1
0
0
1
1
X
鈥⑩€⑩€?/div>
X
FIGURE 3-6:
CS
READ TIMING
CLK
DI
1
1
0
An
鈥⑩€⑩€?/div>
A0
DO
HIGH-Z
0
Dx
鈥⑩€⑩€?/div>
D0
Dx
鈥⑩€⑩€?/div>
D0
Dx
鈥⑩€⑩€?/div>
D0
DS21207B-page 6
Preliminary
漏
1998 Microchip Technology Inc.
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