ADM4850鈥揂DM4857
ADM4850/ADM4854 TIMING SPECIFICATIONS
V = 5 V 卤 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 3.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay t
PLH
, t
PHL
Skew t
SKEW
Rise/Fall Time t
R
, t
F
Enable Time
Disable Time
Enable Time from Shutdown
RECEIVER
Propagation Delay t
PLH
, t
PH
Differential Skew t
SKEW
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shut Down
Min
115
600
600
Typ
Max
Unit
kbps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
2500
70
2400
2000
2000
4000
R
LDIFF
= 54 鈩? C
L1
= C
L2
= 100 pF, Figure 6
R
LDIFF
= 54 鈩? C
L1
= C
L2
= 100 pF, Figure 6
R
LDIFF
= 54 鈩? C
L1
= C
L2
= 100 pF, Figure 6
R
L
= 500 鈩? C
L
= 100 pF, Figure 7, ADM4850
R
L
= 500 鈩? C
L
= 15 pF, Figure 7, ADM4850
R
L
= 500 鈩? C
L
= 100 pF, Figure 7, ADM4850
C
L
= 15 pF, Figure 8
C
L
= 15 pF, Figure 8
R
L
= 1 k鈩? C
L
= 15 pF, Figure 9, ADM4850
R
L
= 1 k鈩? C
L
= 15 pF, Figure 9, ADM4850
R
L
= 1 k鈩? C
L
= 15 pF, Figure 9, ADM4850
ADM4850
1
400
5
20
4000
330
1000
255
50
50
3000
50
1
The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
ADM4851/ADM4855 TIMING SPECIFICATIONS
V = 5 V 卤 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 4.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay t
PLH
, t
PHL
Skew t
SKEW
Rise/Fall Time t
R
, t
F
Enable Time
Disable Time
Enable Time from Shutdown
RECEIVER
Propagation Delay t
PLH
, t
PHL
Differential Skew t
SKEW
Enable Time
Disable Time
Enable Time from Shutdown
Time to Shut Down
Min
500
250
200
Typ
Max
Unit
kbps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
600
40
600
1000
1000
4000
R
LDIFF
= 54 鈩? C
L1
= C
L2
= 100 pF, Figure 6
R
LDIFF
= 54 鈩? C
L1
= C
L2
= 100 pF, Figure 6
R
LDIFF
= 54 鈩? C
L1
= C
L2
= 100 pF, Figure 6
R
L
= 500 鈩? C
L
= 100 pF, Figure 7, ADM4851
R
L
= 500 鈩? C
L
= 15 pF, Figure 7, ADM4851
R
L
= 500 鈩? C
L
= 100 pF, Figure 7, ADM4851
C
L
= 15 pF, Figure 8
C
L
= 15 pF, Figure 8
R
L
= 1 k鈩? C
L
= 15 pF, Figure 9, ADM4851
R
L
=1 k鈩? C
L
= 15 pF, Figure 9, ADM4851
R
L
=1 k鈩? C
L
= 15 pF, Figure 9, ADM4851
ADM4851
1
400
5
20
4000
330
1000
250
50
50
3000
50
1
The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
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