FOR
FOR
CY7C68001
11.3.5
Slave FIFO Asynchronous Read
t
RDpwh
SLRD
t
RDpwl
t
XFLG
FLAGS
t
XFD
DATA
N
t
OEon
N+1
t
OEoff
SLOE
Figure 11-9. Slave FIFO Asynchronous Read Timing Diagram
[12]
Table 11-14. Slave FIFO Asynchronous Read Parameters
[14]
Parameter
t
RDpwl
t
RDpwh
t
XFLG
t
XFD
t
OEon
t
OEoff
11.3.6
Description
SLRD Pulse Width Low
SLRD Pulse Width HIGH
SLRD to FLAGS Output Propagation Delay
SLRD to FIFO Data Output Propagation Delay
SLOE Turn-on to FIFO Data Valid
SLOE Turn-off to FIFO Data Hold
Slave FIFO Asynchronous Write
t
WRpwh
SLWR/SLCS#
t
WRpwl
t
SFD
DATA
t
FDH
Min.
50
50
Max.
Unit
ns
ns
70
15
10.5
10.5
ns
ns
ns
ns
FLAGS
t
XFD
Figure 11-10. Slave FIFO Asynchronous Write Timing Diagram
[12]
Table 11-15. Slave FIFO Asynchronous Write Parameters with Internally Sourced IFCLK
[14]
Parameter
t
WRpwl
t
WRpwh
t
SFD
t
FDH
t
XFD
SLWR Pulse LOW
SLWR Pulse HIGH
SLWR to FIFO DATA Set-up Time
FIFO DATA to SLWR Hold Time
SLWR to FLAGS Output Propagation Delay
Description
Min.
50
70
10
10
70
Max.
Unit
ns
ns
ns
ns
ns
Note:
14. Slave FIFO asynchronous parameter values are using internal IFCLK setting at 48 MHz.
Document #: 38-08013 Rev. *E
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