Philips Semiconductors
Preliminary speci铿乧ation
Full bridge vertical de铿俥ction output circuit
in LVDMOS
BLOCK DIAGRAM
GUARD
VP
VFB
TDA8357J
handbook, full pagewidth
8
GUARD
CIRCUIT
3
6
M5
D3
M2
D2
Vi(p-p)
D1
VI(bias)
0
INPUT
AND
FEEDBACK
CIRCUIT
INB
2
M1
4
M3
OUTB
9
FEEDB
INA
1
M4
7
OUTA
Vi(p-p)
VI(bias)
0
TDA8357J
5
MGS803
GND
Fig.1 Block diagram.
PINNING
SYMBOL
INA
INB
V
P
OUTB
GND
V
FB
OUTA
GUARD
FEEDB
PIN
1
2
3
4
5
6
7
8
9
DESCRIPTION
input A
input B
supply voltage
output B
ground
铿倅back supply voltage
output A
guard output
feedback input
VP
OUTB
GND
VFB
OUTA
GUARD
FEEDB
3
4
5
6
7
8
9
MGS804
handbook, halfpage
INA
INB
1
2
TDA8357J
The exposed die pad is connected to pin GND.
Fig.2 Pin configuration.
1999 Nov 10
3