一种Cortex-M3 CPU USB接口方案

出处:王蓉,徐琼燕(九江职业技术学院 江西九江 332007) 发布于:2011-09-02 08:28:11

  简述

    微控制器是将微型计算机的主要部分集成在一个芯片上的单芯片微型计算机。微控制器诞生于20世纪70年代中期,经过20多年的发展,其成本越来越低,而性能越来越强大,这使其应用已经无处不在,遍及各个领域。例如电机控制、条码阅读器/扫描器、消费类电子、游戏设备、电话、HVAC、楼宇安全与门禁控制、工业控制与自动化和白色家电(洗衣机、微波炉)等。微控制器(Microcontroller Unit,即MCU)可从不同方面进行分类:根据数据总线宽度可分为8位、16位和32位机;根据存储器结构可分为Harvard结构和Von Neumann结构;根据内嵌程序存储器的类别可分为OTP、掩膜、EPROM/EEPROM和闪存Flash;根据指令结构又可分为CISC(Complex Instruction Set Computer)和RISC(Reduced Instruction Set Computer)微控制器。

  NXP LPC1311/13/42/43 是基于Cortex-M3 的,具有高度集成和低功耗,可用于嵌入式应用。CPU工作频率高达72MHz,单电源2.0V-3.6V工作,内置了嵌套中断向量控制器(NVIC),多达32KB闪存,多达8KB数据存储器,USB设备,快速模式I2C总线接口,一个UART,四个通用定时器和多达42个GPIO引脚。中央处理器是一台计算机的运算和控制。CPU、内部存储器和输入/输出设备是电子计算机三大部件。电脑中所有操作都由CPU负责读取指令,对指令译码并执行指令的部件。其功能主要是解释计算机指令以及处理计算机软件中的数据。所谓的计算机的可编程性主要是指对CPU的编程。 CPU由运算器、控制器和寄存器及实现它们之间联系的数据、控制及状态的总线构成。差不多所有的CPU的运作原理可分为四个阶段:提取(Fetch)、解码(Decode)、执行(Execute)和写回(Writeback)。本文介绍了LPC1311/13/42/43主要特性,方框图,时钟发生方框图以及自供电USB接口框图和总线供电USB接口框图。

  The LPC1311/13/42/43 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.

  The LPC1311/13/42/43 operate at CPU frequencies of up to 72 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.

  The peripheral complement of the LPC1311/13/42/43 includes up to 32 kB of flash memory, up to 8 kB of data memory, USB Device (LPC1342/43 only), one Fast-mode Plus I2C-bus interface, one UART, four general purpose timers, and up to 42 general purpose I/O pins.

  LPC1311/13/42/43主要特性和优势:

  ARM Cortex-M3 processor, running at frequencies of up to 72 MHz.

  ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC)。

  32 kB (LPC1343/13)/16 kB (LPC1342)/8 kB (LPC1311) on-chip flash programming memory.

  8 kB (LPC1343/13)/4 kB (LPC1342/11) SRAM.

  In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.

  Selectable boot-up: UART or USB (USB on LPC134x only)。

  On LPC134x: USB MSC and HID on-chip drivers.

  Serial interfaces:

  USB 2.0 full-speed device controller with on-chip PHY for device (LPC1342/43 only)。

  UART with fractional baud rate generation, modem, internal FIFO, and RS-485/EIA-485 support.

  SSP controller with FIFO and multi-protocol capabilities.

  I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode.

  Other peripherals:

  Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors.

  Four general purpose counter/timers with a total of four capture inputs and 13 match outputs.

  Programmable WatchDog Timer (WDT)。

  System tick timer.

  Serial Wire Debug and Serial Wire Trace port.

  High-current output driver (20 mA) on one pin.

  High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.

  Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes.

  Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.

  Single power supply (2.0 V to 3.6 V)。

  10-bit ADC with input multiplexing among 8 pins.

  GPIO pins can be used as edge and level sensitive interrupt sources.

  Clock output function with pider that can reflect the system oscillator clock, IRC clock, CPU clock, or the watchdog clock.

  Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 40 of the functional pins.

  Brownout detect with four separate thresholds for interrupt and one threshold for forced reset.

  Power-On Reset (POR)。

  Integrated oscillator with an operating range of 1 MHz to 25 MHz.

  12 MHz internal RC oscillator trimmed to 1 % accuracy over the entire temperature and voltage range that can optionally be used as a system clock.

  Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.

  System PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.

  For USB (LPC1342/43), a second, dedicated PLL is provided.

  Code Read Protection (CRP) with different security levels.

  Unique device serial number for identification.

  Available as 48-pin LQFP package and 33-pin HVQFN package.

  LPC1311/13/42/43应用:

  eMetering

  Lighting

  Alarm systems

  White goods

  图1 LPC1311/13/42/43方框图

  图2 LPC1311/13/42/43时钟发生方框图

  图3 LPC1311/13/42/43自供电USB接口框图

  图3 LPC1342/43总线供电USB接口框图


  
关键词:USBUSB接口接口

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