93XX46X/56X/66X/76X/86X
4.5
Organization (ORG)
4.6
Program Enable (PE)
When the ORG pin is connected to V
CC
or Logic HI, the
(x16) memory organization is selected. When the ORG
pin is tied to V
SS
or Logic LO, the (x8) memory
organization is selected. For proper operation, ORG
must be tied to a valid logic level.
For devices without the ORG functionality, there is no
internal connection to the ORG pin. In these devices
the functionality has been set at the factory to support
a single word size.
鈥楢鈥?series devices 鈥?x8 organization
鈥楤鈥?series devices 鈥?x16 organization
A logic level on the PE pin will enable or disable the abil-
ity to write data to the memory array in only the 8-lead
93XX76C and 93XX86C devices. For all other devices
the PE function is not present and the PE pin is a no
connect. When driving the PE pin to a logic High, the
device can be programmed, but when the PE pin is
driven Low, programming is inhibited. This pin is used
in parallel with the EWEN/EWDS latch to protect the
memory array from inadvertent writes, as shown in
Table 4-2.
In either the 93XX76C or 93XX86C devices, the PE pin
must be tied to a specific logic level and cannot be
floated. In all other devices without the PE function, the
PE pin has no internal connections and programming is
always enabled.
TABLE 4-2:
WRITE PROTECTION SCHEME
PE Pin*
1
1
0
0
Array WRITE
Yes
No
No
No
Enabled
Disabled
Enabled
Disabled
EWEN/EWDS Latch
* PE pin level does not alter the state of the EWEN/EWDS latch.
Note:
For devices with PE functionality such as 93XX76C or 93XX86C, the write sequence requires a logic high
signal on the PE pin prior to the rising edge of clock on the last data bit.
DS21929D-page 18
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2007 Microchip Technology Inc.