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CA3240EZ Datasheet

  • CA3240EZ

  • Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/...

  • 106.00KB

  • 15页

  • INTERSIL

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CA3240, CA3240A
Electrical Specifications
PARAMETER
Equivalent Input Noise Voltage
(See Figure 18)
Short-Circuit Current to Opposite Supply
For Equipment Design, V
SUPPLY
=
卤15V,
T
A
= 25
o
C, Unless Otherwise Specified
(Continued)
TYPICAL VALUES
SYMBOL
e
N
I
OM
+
I
OM
-
Gain Bandwidth Product (See Figures 13, 27)
Slew Rate (See Figure 14)
Transient Response (See Figure 1)
f
T
SR
t
r
OS
Settling Time at 10V
P-P
(See Figure 25)
Crosstalk (See Figure 22)
t
S
R
L
= 2k鈩? C
L
= 100pF
R
L
= 2k鈩? C
L
= 100pF
A
V
= +1, R
L
= 2k鈩? C
L
= 100pF,
Voltage Follower
f = 1kHz
Rise Time
Overshoot
To 1mV
To 10mV
TEST CONDITIONS
f = 1kHz, R
S
= 100鈩?/div>
f = 10kHz, R
S
= 100鈩?/div>
Source
Sink
CA3240A CA3240
40
12
40
11
4.5
9
0.08
10
4.5
1.4
120
40
12
40
11
4.5
9
0.08
10
4.5
1.4
120
UNITS
nV/鈭欻z
nV/鈭欻z
mA
mA
MHz
V/碌s
碌s
%
碌s
碌s
dB
Electrical Specifications
For Equipment Design, at V
SUPPLY
=
卤15V,
T
A
= -40 to 85
o
C, Unless Otherwise Specified
TYPICAL VALUES
PARAMETER
Input Offset Voltage
Input Offset Current (Note 8)
Input Current (Note 8)
Large Signal Voltage Gain (See Figures 12, 27), (Note 6)
SYMBOL
|V
IO
|
|I
IO
|
I
I
A
OL
CMRR
CA3240A
3
32
640
63
96
CA3240
10
32
640
63
96
32
90
-15 to +12.3
150
76
12.4
-14.2
8.4
252
15
UNITS
mV
pA
pA
kV/V
dB
碌V/V
dB
V
碌V/V
dB
V
V
mA
mW
碌V/
o
C
Common Mode Rejection Ratio (See Figure 17)
32
90
Common Mode Input Voltage Range (See Figure 24)
Power Supply Rejection Ratio (See Figure 19)
V
ICR
PSRR
(鈭哣
IO
/鈭哣卤)
V
OM
+
V
OM
-
I+
P
D
鈭哣
IO
/鈭員
-15 to +12.3
150
76
12.4
-14.2
8.4
252
15
Maximum Output Voltage (Note 7) (See Figures 23, 24)
Supply Current (See Figure 15) Total For Both Amps
Total Device Dissipation
Temperature Coefficient of Input Offset Voltage
NOTES:
6. At V
O
= 26V
P-P
, +12V, -14V and R
L
= 2k鈩?
7. At R
L
= 2k鈩?
8. At T
A
= 85
o
C.
Electrical Specifications
For Equipment Design, at V+ = 5V, V- = 0V, T
A
= 25
o
C, Unless Otherwise Specified
TYPICAL VALUES
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Input Resistance
Large Signal Voltage Gain (See Figures 12, 27)
SYMBOL
|V
IO
|
|I
IO
|
I
I
R
IN
A
OL
CA3240A
2
0.1
2
1
100
100
CA3240
5
0.1
2
1
100
100
UNITS
mV
pA
pA
T鈩?/div>
kV/V
dB
3
FN1050.6
March 4, 2005

CA3240EZ 产品属性

  • 50

  • 集成电路 (IC)

  • Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps

  • -

  • 通用

  • 2

  • -

  • 9 V/µs

  • 4.5MHz

  • -

  • 10pA

  • 5000µV

  • 8mA

  • 40mA

  • 4 V ~ 36 V，±2 V ~ 18 V

  • -40°C ~ 85°C

  • 通孔

  • 8-DIP（0.300"，7.62mm）

  • 8-PDIP

  • 管件

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