鈮?/div>
5.5V, unless otherwise stated.
Parameter
No.
General
PD1
PD2
PD3
PD4
PD5
PD6
PD9
PD8
V
DDP
Supply voltage during programming
I
DDP
Supply current (from V
DD
)
during programming
V
DD
min
12.75
V
DD
+ 4.0
4.75
5.0
5.25
20
V
DD
max
13.25
13.5
50
0.8 V
DD
0.2 V
DD
mA
V
V
Schmitt Trigger input
Schmitt Trigger input
V
mA
V
V
Note 1
Note 2
Sym.
Characteristic
Min.
Typ.
Max.
Units
Conditions
V
DDV
Supply voltage during verify
V
IHH
1 Voltage on MCLR/V
PP
during
programming
V
IHH
2 Voltage on MCLR/V
PP
during verify
I
PP
V
IH
1
V
IL
1
Programming supply current (from
V
PP
)
(GP0, GP1) input high level
(GP0, GP1) input low level
Serial Program Verify
P1
P2
P3
P4
P5
T
R
Tf
MCLR/V
PP
rise time (V
SS
to V
IHH
)
for test mode entry
MCLR Fall time
100
100
1.0
8.0
8.0
碌s
碌s
ns
ns
碌s
Tset1 Data in setup time before clock
鈫?/div>
Thld1 Data in hold time after clock
鈫?/div>
Tdly1 Data input not driven to next clock
input (delay required between com-
mand/data or command/command)
Tdly2 Delay between clock
鈫?/div>
to clock
鈫?/div>
of
next command or data
Tdly3 Clock
鈫?/div>
to data out valid
(during read data)
Thld0 Hold time after V
DD
鈫?/div>
T
PPDP
Hold time after V
PP
鈫?/div>
P6
P7
P8
P9
1.0
200
2
5
碌s
ns
碌s
碌s
Note 1: Program must be veri铿乪d at the minimum and maximum V
DD
limits for the part.
Note 2: V
IHH
must be greater than V
DD
+ 4.5V to stay in programming/verify mode.
漏
1998 Microchip Technology Inc.
DS40175A-page 11
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