AT24C64B
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th BIT
WORDn
ACK
twr
STOP
CONDITION
Note:
(1)
START
CONDITION
1. The write cycle time t
WR
is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
7
3350C鈥揝EEPR鈥?/04