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TPS2220A, TPS2223A
TPS2224A, TPS2226A
SLVS428B 鈥?MAY 2002 鈥?REVISED SEPTEMBER 2004
ESD PROTECTIONS (see Figure 35)
All inputs and outputs of these devices incorporate ESD-protection circuitry designed to withstand a 2-kV
human-body-model discharge as defined in MIL-STD-883C, Method 3015. The xVCC and xVPP outputs can be
exposed to potentially higher discharges from the external environment through the PC Card connector.
Bypassing the outputs with 0.1-碌F capacitors protects the devices from discharges up to 10 kV.
TPS2226A
AVCC
0.1
AVCC
碌F
鈥?/div>
V
CC
V
CC
PC Card
Connector A
AVPP
0.1
碌F
鈥?/div>
V
pp1
V
pp2
12 V
4.7
碌F
0.1
碌F
12 V
12 V
5V
5V
5V
BVCC
0.1
BVCC
碌F
鈥?/div>
V
CC
V
CC
PC Card
Connector B
5V
4.7
碌F
0.1
碌F
BVPP
0.1
碌F
鈥?/div>
V
pp1
V
pp2
3.3 V
4.7
碌F
0.1
碌F
3.3 V
3.3 V
3.3 V
DATA
CLOCK
LATCH
RESET
OC
From PCI or
System RST
GPI/O
Controller
DATA
CLOCK
LATCH
鈥?/div>
Maximum recommended output capacitance for xVCC is 220
碌F
including card capacitance, and for xVPP is 10
碌F,
without OC glitch when
switches are powered on.
Figure 35. Detailed Interconnections and Capacitor Recommendations
25
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