24LC41 Datasheet

IC型号：
24LC41
PDF描述：
1K/4K 2.5V Dual Mode, Dual Port I 2 C ? Serial EEPROM
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140.45KB
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24LC41

8.0

8.1

PIN DESCRIPTIONS

DSDA

8.4

MSCL

This pin is used to transfer addresses and data into and

out of the DDC Monitor Port, when the device is in the

bi-directional Mode. In the Transmit-Only Mode, which

only allows data to be read from the device, data is also

transferred on the DSDA pin. This pin is an open drain

terminal, therefore the DSDA bus requires a pullup

resistor to V

(typical 10K鈩?for 100 kHz, 1K鈩?for 400

kHz).

For normal data transfer in the bi-directional Mode,

DSDA is allowed to change only during DSCL or MSDA

low. Changes during DSCL high are reserved for indi-

cating the START and STOP conditions.

This pin is the clock input for the Microcontroller Access

Port, and is used to synchronize data transfer to and

from the device.

8.5

MSDA

This pin is used to transfer addresses and data into and

out of the Microcontroller Access Port. This pin is an

open drain terminal, therefore the MSDA bus requires

a pullup resistor to V

(typical 10K鈩?for 100 kHz, 1K鈩?/div>

for 400 kHz).

MSDA is allowed to change only during MSCL low.

Changes during MSCL high are reserved for indicating

the START and STOP conditions.

8.2

DSCL

8.6

MWP

This pin is the clock input for the DDC Monitor Port

while in the bi-directional Mode, and is used to synchro-

nize data transfer to and from the device. It is also used

as the signaling input to switch the device from the

Transmit-Only Mode to the bi-directional Mode. It must

remain high for the chip to continue operation in the

Transmit-Only Mode.

This pin is used to write protect the 4K memory array

for the Microcontroller Access Port.

This pin must be connected to either V

or V

If tied to Vss, normal memory operation is enabled

(read/write the entire memory).

If tied to V

, WRITE operations are inhibited. The

entire memory will be write-protected. Read operations

are not affected.

8.3

VCLK/DWP

This pin is the clock input for the DDC Monitor Port

while in the Transmit-Only Mode. In the Transmit-Only

Mode, each bit is clocked out on the rising edge of this

signal. In the bi-directional Mode, a high logic level is

required on this pin to enable write capability.

漏

1996 Microchip Technology Inc.

DS21140B-page 11

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