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ook, full pagewidth
2002 Jan 21
RGRD
12 k鈩?/div>
GUARD
8
GUARD
CIRCUIT
Vi(p-p)
VI(bias)
0
D1
INA
1
C6
2.2 nF
TV SIGNAL
PROCESSOR
RCV1
2.2 k鈩?/div>
(1%)
INPUT
AND
FEEDBACK
CIRCUIT
Philips Semiconductors
Full bridge vertical de铿俥ction output circuit
in LVDMOS
VP
= 14 V
VFB
= 30 V
VP
3
VFB
6
C3
100 nF
C1
47
碌F
(100 V)
C4
100 nF
C2
220
碌F
(25 V)
M5
D2
D3
M2
D4
(14 V)
RCMP
680 k鈩?/div>
7
OUTA
M4
9
FEEDB
RS
2.7 k鈩?/div>
RD1
270
鈩?/div>
deflection
coil
5 mH
6
鈩?/div>
(W66ESF)
RM
0.5
鈩?/div>
4
OUTB
M3
CD
47 nF
RD2
1.5
鈩?/div>
9
INB
2
C7
2.2 nF
Vi(p-p)
VI(bias)
0
RCV2
2.2 k鈩?/div>
(1%)
M1
TDA8359J
5
GND
MBL364
Product speci铿乧ation
TDA8359J
f
vert
= 50 Hz; t
FB
= 640
碌s;
I
I(bias)
= 400
碌A;
I
i(p-p)
= 290
碌A;
I
o(p-p)
= 2.4 A.
Fig.4 Application diagram.
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