鈥?/div>
800ps Part鈥搕o鈥揚art Skew
250ps Output鈥搕o鈥揙utput Skew
Open Emitter HSTL Compatible Outputs
Differential Design
28鈥揕ead PLCC
3.3V VCC
LOW-VOLTAGE
1:9 DIFFERENTIAL ECL/HSTL
TO HSTL CLOCK DRIVER
The MPC911 HSTL outputs are not realized in the conventional
manner. To minimize part鈥搕o鈥損art and output鈥搕o鈥搊utput skew the HSTL
compatible output levels are generated with an open emitter architecture.
The outputs are pulled down with 50鈩?to ground rather than the typical
50鈩?to VDDQ pullup of a 鈥渟tandard鈥?HSTL output. Because the HSTL
outputs are pulled to ground the MPC911 does not utilize the VDDQ supply
of the HSTL standard. The output levels are derived from VCC, an internal
regulator minimizes the output level variation with VCC variations.
Pinout: 28-Lead PLCC
(Top View)
Q0
25
VEE
CLK_Sel
HSTL_CLK
VCC
HSTL_CLK
PECL_CLK
PECL_CLK
26
27
28
1
2
3
4
5
Q8
6
Q8
7
Q7
8
9
10
Q6
11
Q6
Q0
24
Q1 VCCO Q1
23
22
21
Q2
20
Q2
19
18
17
16
15
14
13
12
Q3
Q3
Q4
VCCO
Q4
Q5
Q5
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
PIN NAMES
Pins
HSTL_CLK, HSTL_CLK
PECL_CLK, PECL_CLK
Q0鈥換8, Q0鈥換8
Function
Differential HSTL Input
Differential PECL Input
Differential Outputs
VCCO Q7
1/96
漏
Motorola, Inc. 1996
1
REV 1
1
2
3
4
