PIC16C745 Datasheet

IC型号：
PIC16C745
PDF描述：
8-Bit CMOS Microcontrollers with USB
文件大小：
4945.69KB
PDF页数：
165页
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PIC16C745/765

TABLE 4-1:

Address

Name

SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR,

BOR

Value on all

other resets

(2)

Bank 2

100h

101h

102h

103h

104h

105h

106h

107h

108h

109h

10Ah

10Bh

10Ch-

11Fh

INDF

(3)

TMR0

PCL

(3)

STATUS

(3)

FSR

(3)

鈥?/div>

PORTB

鈥?/div>

PCLATH

(1,3)

INTCON

(3)

鈥?/div>

Addressing this location uses contents of FSR to address data memory (not a physical register)

Timer0 module鈥檚 register

Program Counter's (PC) Least Significant Byte

IRP

RP1

RP0

0000 0000 0000 0000

xxxx xxxx uuuu uuuu

0000 0000 0000 0000

0001 1xxx 000q quuu

xxxx xxxx uuuu uuuu

鈥?/div>

Indirect data memory address pointer

Unimplemented

PORTB Data Latch when written: PORTB pins when read

Unimplemented

鈥?/div>

GIE

鈥?/div>

PEIE

鈥?/div>

T0IE

Write Buffer for the upper 5 bits of the Program Counter

INTE

RBIE

T0IF

INTF

RBIF

xxxx xxxx uuuu uuuu

鈥?/div>

---0 0000 ---0 0000

0000 000x 0000 000u

鈥?/div>

Unimplemented

Legend:

= unknown,

= unchanged,

= value depends on condition, - = unimplemented read as 鈥?鈥?

Shaded locations are unimplemented, read as 鈥?鈥?

Note 1:

The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents

are transferred to the upper byte of the program counter.

Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.

These registers can be addressed from either bank.

The Parallel Slave Port (PORTD and PORTE) is not implemented on the PIC16C745, always maintain these bits clear.

漏

1999 Microchip Technology Inc.

Advanced Information

DS41124A-page 19

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