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CS5321-BLZ Datasheet

  • CS5321-BLZ

  • Cirrus Logic [24-bit, Variable-bandwidth A/D Converter Chip...

  • 672.92KB

  • CIRRUS

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CS5321/22
2.17 Status Bits
The Status Register is a 16-bit register which al-
lows the user to read the flags and configuration
settings of the CS5322. Table 3 documents the data
bits of the Status Register.
The ERROR bit and ERROR pin value are the
OR鈥檈d result of OVERWRITE, MFLG, ACC1, and
ACC2. The ERROR bit is active high whenever
any of the four error bits are set due to a fault con-
dition. The ERROR pin output is active low and
has a nominal 100 k鈩?internal pull-up resistor.
The OVERWRITE bit is set when new conversion
data is ready to be loaded into the data register, but
the previous data was not completely read out. This
can occur on either of two conditions: a read oper-
ation is in progress or a read operation was started,
then aborted, and not completed. These two condi-
tions are data read attempts. The attempt is identi-
fied by the first SCLK low edge (MSB read) of a
data register read. If a data register read is not at-
tempted, the CS5322 assumes that data is not want-
ed and does not assert OVERWRITE, and the old
data is over-written by the new data. On an OVER-
WRITE condition, the old partially read data is pre-
served, and the new data word is lost.
Status reads have no effect on OVERWRITE assert
operations. The OVERWRITE bit is cleared on a
status register read or RESET.
The MFLG error bit reflects the CS5321 MFLG
signal. Any high level on the CS5322 MFLG pin
will set the MFLG status bit. The bit is cleared on a
status register read or RESET operation, only if the
MFLG pin on the CS5322 has returned low. A in-
ternal nominal 100 k鈩?pulldown resistor is on the
MFLG pin.
The accumulator error bits, ACC1 and ACC2, indi-
cate that an underflow or overflow has occurred in
the FIR1 filter for ACC1, or the FIR2 and FIR3 fil-
ters for ACC2. Both errors are cleared on a status
read, provided the error conditions are no longer
Output Bit #
1 (MSB)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Function
Error
OVERWRITE Error
MFLG Error
ACC1 Error
ACC2 Error
DRDY
1SYNC
ORCALD
PWDN
ORCAL
USEOR
CSEL
Reserved
DECC
DECB
DECA
Description
Detects one of the errors below
Overwrite Error
Modulator Flag Error
Accumulator 1 Error
Accumulator Error
Data Ready
First sample after SYNC
Offset calibration done
Standby mode
Self-offset Calibration
Use Offset Register
Channel Select
Factory use only
Bandwidth Selection Status
Bandwidth Selection Status
Bandwidth Selection Status
Table 3. Status Data (from the SOD Pin)
26
DS454F2

CS5321-BLZ 产品属性

  • Cirrus Logic

  • ADC（模数转换器）

  • 1

  • 1

  • Delta-Sigma

  • 4 KSPs

  • 24 bit

  • Voltage

  • Serial

  • 115 dB

  • 4 V to 4.5 V

  • 4.75 V

  • 5.25 V

  • 100 mW

  • + 85 C

  • SMD/SMT

  • PLCC-28

  • Tube

  • - 55 C

  • +/- 4.5 V

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