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MAX793T Datasheet

  • MAX793T

  • 3.0V/3.3V可调、微处理器监控电路, 微处理器监控电路, 提供备用...

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  • 20页

  • MAXIM

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3.0V/3.3V Adjustable Microprocessor
Supervisory Circuits
MAX793/MAX794/MAX795
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 3.17V to 5.5V for the MAX793T/MAX795T, V
CC
= 3.02V to 5.5V for the MAX793S/MAX795S, V
CC
= 2.72V to 5.5V for the
MAX793R/MAX794/MAX795R, V
BATT
= 3.6V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25掳C.)
PARAMETER
RESET Output Voltage Low
BATT ON Output
Voltage Low
All Inputs Including PFO
(Note 10)
MANUAL RESET INPUT
MR Pulse Width
MR-to-Reset Delay
MR Pull-Up Current
CHIP-ENABLE GATING
CE IN Leakage Current
CE IN-to-CE OUT
Resistance
CE IN-to-CE OUT
Propagation Delay
V
OH
CE OUT Drive from CE IN
V
OL
Reset to CE OUT High Delay
CE OUT Output Voltage
High (reset active)
WDI Input Current
Watchdog Timeout Period
WDI Pulse Width
t
WD
V
OH
I
OH
= 500碌A, V
CC
< 2.3V
0.8V
BATT
I
LEAK
Disable mode
Enable mode, V
CC
= V
RST
max
V
CC
= V
RST
max, Figure 9
V
CC
= V
RST
max, I
OUT
= -1mA,
V
CE IN
= V
CC
V
CC
= V
RST
max, I
OUT
= 1.6mA,
V
CE IN
= 0V
10
0.8V
CC
V
0.2V
CC
碌s
V
卤10
46
2
7
nA
鈩?/div>
ns
t
MR
t
MD
MAX793/MAX794 only
MAX793/MAX794 only
MAX793/MAX794 only, MR = 0V
25
100
50
75
70
250
250
ns
ns
碌A
SYMBOL
V
OL
V
OL
V
IH
V
IL
CONDITIONS
MAX79_C, V
BATT
= V
CC
= 1.0V, I
SINK
= 40碌A
MAX79_E, V
BATT
= V
CC
= 1.2V, I
SINK
= 200碌A
I
SINK
= 3.2mA, V
CC
= V
RST
max
V
RST
max < V
CC
< 5.5V
MIN
TYP
0.13
0.17
MAX
0.3
0.3
0.2V
CC
0.7V
CC
0.3V
CC
UNITS
V
V
V
WATCHDOG (MAX793/MAX794 only)
0V < V
CC
< 5.5V
-1
1.00
1.00
0.01
1.60
1
2.25
碌A
sec
ns
Note 1:
V
CC
supply current, logic input leakage, watchdog functionality (MAX793/MAX794), MR functionality (MAX793/MAX794),
PFI functionality (MAX793/MAX794), state of RESET and RESET (MAX793/MAX794) tested at V
BATT
= 3.6V and V
CC
= 5.5V.
The state of RESET is tested at V
CC
= V
CC
min.
Note 2:
Tested at V
BATT
= 3.6V, V
CC
= 3.5V and 0V. The battery current will rise to 10碌A over a narrow transition window around
V
CC
= 1.9V.
Note 3:
Leakage current into the battery is tested under the worst-case conditions at V
CC
= 5.5V, V
BATT
= 1.8V and V
CC
= 1.5V,
V
BATT
= 1.0V.
Note 4:
Guaranteed by design.
Note 5:
When V
SW
> V
CC
> V
BATT
, OUT remains connected to V
CC
until V
CC
drops below V
BATT
. The V
CC
-to-V
BATT
comparator
has a small 15mV typical hysteresis to prevent oscillation. For V
CC
< 1.75V (typical), OUT switches to BATT regardless of
V
BATT
.
Note 6:
When V
BATT
> V
CC
> V
SW
, OUT remains connected to V
CC
until V
CC
drops below the battery switch threshold (V
SW
).
Note 7:
OUT switches from BATT to V
CC
when V
CC
rises above the reset threshold, if V
BATT
> V
RST
. In this case, switchover back
to V
CC
occurs at the exact voltage that causes reset to be asserted, however switchover occurs 200ms prior to reset. If
V
BATT
< V
RST
, OUT switches from BATT to V
CC
when V
CC
exceeds V
BATT
.
Note 8:
The reset threshold tolerance is wider for V
CC
rising than for V
CC
falling to accommodate the 10mV typical hysteresis,
which prevents internal oscillation.
Note 9:
The leakage current into or out of the RESET pin is tested with RESET not asserted (RESET output high impedance).
Note 10:
PFO is normally an output, but is used as an input when activating the battery freshness seal.
4
_______________________________________________________________________________________

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