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MAX793T Datasheet

  • MAX793T

  • 3.0V/3.3V可调、微处理器监控电路, 微处理器监控电路, 提供备用...

  • 604.40KB

  • 20页

  • MAXIM

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3.0V/3.3V Adjustable Microprocessor
Supervisory Circuits
brownout conditions. RESET is guaranteed to be a
logic low for 0V < V
CC
< V
RST
, provided V
BATT
is
greater than 1V. Without a backup battery (V
BATT
=
V
CC
= V
OUT
), RESET is guaranteed valid for V
CC
鈮?/div>
1V.
Once V
CC
exceeds the reset threshold, an internal
timer keeps RESET low for the reset timeout period
(t
RP
); after this interval, RESET becomes high imped-
ance (Figure 2). RESET is an open-drain output, and
requires a pull-up resistor to V
CC
(Figure 3). Use a
4.7k鈩?to 1M鈩?pull-up resistor that will provide sufficient
current to assure the proper logic levels to the 碌P.
V
LL
V
CC
V
RST
V
SW
If a brownout condition occurs (V
CC
dips below the
reset threshold), RESET goes low. Each time RESET is
asserted, it stays low for the reset timeout period. Any
time V
CC
goes below the reset threshold, the internal
timer restarts.
The watchdog output (WDO) can also be used to initi-
ate a reset. See the
Watchdog Output
section.
The RESET output is the inverse of the RESET output,
and it can both source and sink current.
MAX793/MAX794/MAX795
V
LOWLINE
(MAX793/MAX794)
4碌s
V
RESET
(RESET PULLED UP TO V
CC
)
20碌s
V
RESET
(MAX793/MAX794)
20碌s
V
CE OUT
10碌s
25碌s
V
BATT
V
WDO
(MAX793/MAX794)
25碌s
V
BOK
(MAX793)
25碌s
V
PFO
(MAX793/MAX794)
25碌s
V
BATT ON
SHOWN FOR V
CC
= 3.3V to 0V, V
BATT
= 3.6V, CE IN = GND, PFI = V
CC
.
TYPICAL DELAY TIMES REFLECT A 40mV OVERDRIVE
MAX794: V
RESET IN
= V
CC
(V
RST IN
/ V
RST
)
25碌s
V
BATT
Figure 2. Timing Diagram, V
CC
Falling
_______________________________________________________________________________________
9

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