鈥?/div>
ns
B34a
13.20
A(0:31), BADDR(28:30), and D(0:31) to
CS valid, as requested by control bit CST1
in the corresponding word in the UPM
(MIN = 0.50
脳
B1 鈥?2.00)
A(0:31), BADDR(28:30), and D(0:31) to
CS valid, as requested by CST2 in the
corresponding word in UPM
(MIN = 0.75
脳
B1 鈥?2.00)
A(0:31), BADDR(28:30) to CS valid, as
requested by control bit BST4 in the
corresponding word in the UPM
(MIN = 0.25
脳
B1 鈥?2.00)
A(0:31), BADDR(28:30), and D(0:31) to
BS valid, as requested by BST1 in the
corresponding word in the UPM
(MIN = 0.50
脳
B1 鈥?2.00)
20.70
鈥?/div>
10.50
鈥?/div>
5.60
鈥?/div>
4.25
鈥?/div>
ns
B34b
鈥?/div>
16.70
鈥?/div>
9.40
鈥?/div>
6.80
鈥?/div>
ns
B35
5.60
鈥?/div>
4.30
鈥?/div>
1.80
鈥?/div>
1.13
鈥?/div>
ns
B35a
13.20
鈥?/div>
10.50
鈥?/div>
5.60
鈥?/div>
4.25
鈥?/div>
ns
B35b
20.70
A(0:31), BADDR(28:30), and D(0:31) to
BS valid, as requested by control bit BST2
in the corresponding word in the UPM
(MIN = 0.75
脳
B1 鈥?2.00)
A(0:31), BADDR(28:30), and D(0:31) to
GPL valid, as requested by control bit
GxT4 in the corresponding word in the
UPM (MIN = 0.25
脳
B1 鈥?2.00)
UPWAIT valid to CLKOUT falling edge
8
(MIN = 0.00
脳
B1 + 6.00)
CLKOUT falling edge to UPWAIT valid
8
(MIN = 0.00
脳
B1 + 1.00)
AS valid to CLKOUT rising edge
9
(MIN = 0.00
脳
B1 + 7.00)
A(0:31), TSIZ(0:1), RD/WR, BURST, valid
to CLKOUT rising edge
(MIN = 0.00
脳
B1 + 7.00)
TS valid to CLKOUT rising edge (setup
time) (MIN = 0.00
脳
B1 + 7.00)
5.60
鈥?/div>
16.70
鈥?/div>
9.40
鈥?/div>
7.40
鈥?/div>
ns
B36
鈥?/div>
4.30
鈥?/div>
1.80
鈥?/div>
1.13
鈥?/div>
ns
B37
B38
B39
B40
6.00
1.00
7.00
7.00
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
6.00
1.00
7.00
7.00
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
6.00
1.00
7.00
7.00
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
6.00
1.00
7.00
7.00
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
ns
ns
ns
ns
B41
7.00
鈥?/div>
7.00
鈥?/div>
7.00
鈥?/div>
7.00
鈥?/div>
ns
MPC885/MPC880 Hardware Specifications, Rev. 3
22
Freescale Semiconductor
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