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MPC885 Datasheet

  • MPC885

  • Freescale Semiconductor, Inc [Hardware Specifications]

  • 1498.97KB

  • FREESCALE

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Features
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鈥?UTOPIA L2-compliant interface with added FIFO buffering to reduce the total cell
transmission time and multi-PHY support. (The earlier UTOPIA L1 specification is also
supported.)
鈥?Parameter RAM for both SPI and I
2
C can be relocated without RAM-based microcode
鈥?Supports full-duplex UTOPIA master (ATM side) and slave (PHY side) operations using a split
bus
鈥?AAL2/VBR functionality is ROM-resident.
Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
32 address lines
Memory controller (eight banks)
鈥?Contains complete dynamic RAM (DRAM) controller
鈥?Each bank can be a chip select or RAS to support a DRAM bank.
鈥?Up to 30 wait states programmable per memory bank
鈥?Glueless interface to DRAM, SIMMS, SRAM, EPROMs, Flash EPROMs, and other memory
devices
鈥?DRAM controller programmable to support most size and speed memory interfaces
鈥?Four CAS lines, four WE lines, and one OE line
鈥?Boot chip-select available at reset (options for 8-, 16-, or 32-bit memory)
鈥?Variable block sizes (32 Kbyte鈥?56 Mbyte)
鈥?Selectable write protection
鈥?On-chip bus arbitration logic
General-purpose timers
鈥?Four 16-bit timers or two 32-bit timers
鈥?Gate mode can enable/disable counting.
鈥?Interrupt can be masked on reference match and event capture
Two fast Ethernet controllers (FEC)鈥擳wo 10/100 Mbps Ethernet/IEEE 802.3 CDMA/CS that
interface through MII and/or RMII interfaces
System integration unit (SIU)
鈥?Bus monitor
鈥?Software watchdog
鈥?Periodic interrupt timer (PIT)
鈥?Clock synthesizer
鈥?Decrementer and time base
鈥?Reset controller
鈥?IEEE 1149.1 test access port (JTAG)
Security engine is optimized to handle all the algorithms associated with IPsec, SSL/TLS, SRTP,
802.11i, and iSCSI processing. Available on the MPC885, the security engine contains a
crypto-channel, a controller, and a set of crypto hardware accelerators (CHAs). The CHAs are:
鈥?Data encryption standard execution unit (DEU)
鈥?DES, 3DES
鈥?Two key (K1, K2, K1) or three key (K1, K2, K3)
鈥?ECB and CBC modes for both DES and 3DES
MPC885/MPC880 Hardware Specifications, Rev. 3
Freescale Semiconductor
3

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