Bus Signal Timing
Figure 16
through
Figure 18
provide the timing for the external bus write controlled by various GPCM factors.
CLKOUT
B11
TS
B8
A[0:31]
B22
CSx
B25
WE[0:3]
B26
OE
B8
D[0:31]
B9
B29
B29
B28
B23
B30
B12
Figure 16. External Bus Write Timing (GPCM Controlled鈥擳RLX = 0, CSNT = 0)
MPC885/MPC880 Hardware Specifications, Rev. 3
30
Freescale Semiconductor