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Package :
- K9XXGXXXXM-YCB0/YIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9W8G08U1M-YCB0/YIB0 : Two K9K4G08U0M stacked.
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9XXGXXXXM-PCB0/PIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9W8G08U1M-PCB0/PIB0 : Two K9K4G08U0M stacked.
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
GENERAL DESCRIPTION
Offered in 512Mx8bit or 256Mx16bit, the K9XXGXXXXM is 4G bit with spare 128M bit capacity. Its NAND cell provides the most
cost-effective solution for the solid state mass storage market. A program operation can be performed in typical 300碌s on the 2112-
byte(X8 device) or 1056-word(X16 device) page and an erase operation can be performed in typical 2ms on a 128K-byte(X8 device)
or 64K-word(X16 device) block. Data in the data page can be read out at 50ns cycle time per byte(30ns, only X8 3.3v device) or
word(X16 device). The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write
controller automates all program and erase functions including pulse repetition, where required, and internal verification and margin-
ing of data. Even the write-intensive systems can take advantage of the K9XXGXXXXM鈥瞫 extended reliability of 100K program/erase
cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The K9XXGXXXXM is an optimum solution for
large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility. An ultra
high density solution having two 4Gb stacked with two chip selects is also available in standard TSOPI package.
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