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K9K4G08U0M Datasheet

  • K9K4G08U0M

  • Samsung semiconductor [512M x 8 Bit / 256M x 16 Bit NAND Fl...

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  • SAMSUNG

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K9W8G08U1M
K9K4G08Q0M
K9K4G08U0M
Device Operation
PAGE READ
K9K4G16Q0M
K9K4G16U0M
FLASH MEMORY
Upon initial device power up, the device defaults to Read mode. This operation is also initiated by writing 00h-30h to the command
register along with five address cycles. In two consecutive read operations, the second one doesn鈥?need 00h command, which five
t
address cycles and 30h command initiates that operation. Once the command is latched, it does not need to be written for the follow-
ing page read operation. Two types of operations are available : random read, serial page read .
The random read mode is enabled when the page address is changed. The 2112 bytes(X8 device) or 1056 words(X16 device) of
data within the selected page are transferred to the data registers in less than 25碌s(t
R
). The system controller can detect the comple-
tion of this data transfer(tR) by analyzing the output of R/B pin. Once the data in a page is loaded into the data registers, they may be
read out in 50ns(30ns in KXXG08UXM only) cycle time by sequentially pulsing RE. The repetitive high to low transitions of the RE
clock make the device output the data starting from the selected column address up to the last column address.
The device may output random data in a page instead of the consecutive sequential data by writing random data output command.
The column address of next data, which is going to be out, may be changed to the address which follows random data output com-
mand. Random data output can be operated multiple times regardless of how many times it is done in a page.
Figure 6. Read Operation
CLE
CE
WE
ALE
R/B
RE
I/Ox
00h
Address(5Cycle)
Col Add1,2 & Row Add1,2,3
30h
Data Output(Serial Access)
t
R
Data Field
Spare Field
30

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