PIC16C717/770/771
4.0
PROGRAM MEMORY READ
(PMR)
When interfacing the program memory block, the
PMDATH & PMDATL registers form a 2-byte word,
which holds the 14-bit data. The PMADRH & PMADRL
registers form a 2-byte word, which holds the 12-bit
address of the program memory location being
accessed. Mid-range devices have up to 8K words of
program EPROM with an address range from 0h to
3FFFh. When the device contains less memory than
the full address range of the PMADRH:PMARDL regis-
ters, the most significant bits of the PMADRH register
are ignored.
4.0.1
PMCON1 REGISTER
Program memory is readable during normal operation
(full V
DD
range). It is indirectly addressed through the
Special Function Registers:
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
PMCON1
PMDATH
PMDATL
PMADRH
PMADRL
PMCON1 is the control register for program memory
accesses.
Control bit RD initiates a read operation. This bit cannot
be cleared, only set, in software. It is cleared in hard-
ware at completion of the read operation.
REGISTER 4-1:
R-1
Reserved
bit7
U-0
鈥?/div>
PROGRAM MEMORY READ CONTROL REGISTER 1 (PMCON1: 18Ch)
U-0
鈥?/div>
U-0
鈥?/div>
U-0
鈥?/div>
U-0
鈥?/div>
U-0
鈥?/div>
R/S-0
RD
bit0
R = Readable bit
W = Writable bit
S = Settable bit
U = Unimplemented bit,
read as 鈥?鈥?/div>
- n = Value at POR reset
bit 7:
bit 0:
Reserved:
Read as 鈥?鈥?/div>
RD:
Read Control bit
1
= Initiates a Program memory read (read takes 2 cycles. RD is cleared in hardware.
0
= Reserved
bit 6-1:
Unimplemented:
Read as '0'
4.0.2
PMDATH AND PMDATL REGISTERS
The PMDATH:PMDATL registers are loaded with the
contents of program memory addressed by the
PMADRH and PMADRL registers upon completion of a
Program Memory Read command.
漏
1999 Microchip Technology Inc.
Advanced Information
DS41120A-page 43
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