PIC16C717/770/771
9.2.13
ACKNOWLEDGE SEQUENCE TIMING
An acknowledge sequence is enabled by setting the
acknowledge
sequence
enable
bit,
ACKEN
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data
bit is presented on the SDA pin. If the user wishes to
generate an acknowledge, then the ACKDT bit should
be cleared. If not, the user should set the ACKDT bit
before starting an acknowledge sequence. The baud
rate generator then counts for one rollover period
(T
BRG
), and the SCL pin is de-asserted (pulled high).
When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for T
BRG
. The SCL pin
is then pulled low. Following this, the ACKEN bit is
automatically cleared, the baud rate generator is turned
off, and the MSSP module then goes into IDLE mode.
(Figure
9-26)
9.2.13.1
WCOL STATUS FLAG
If the user writes the SSPBUF when an acknowledged
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn鈥檛
occur).
FIGURE 9-26: ACKNOWLEDGE SEQUENCE WAVEFORM
Acknowledge sequence starts here,
Write to SSPCON2
ACKEN = 1, ACKDT = 0
T
BRG
SDA
D0
ACK
T
BRG
ACKEN automatically cleared
SCL
8
9
SSPIF
Set SSPIF at the end
of receive
Cleared in
software
Cleared in
software
Set SSPIF at the end
of acknowledge sequence
Note:
T
BRG
= one baud rate generator period.
DS41120A-page 98
Advanced Information
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1999 Microchip Technology Inc.